Describing target hardware in debuggers

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Describing target hardware in debuggers

• Aaron Spear
• DEBUG TECHNOLOGIES ARCHITECT
• ACCELERATED TECHNOLOGY DIVISION
• Feb 2006 DSDP Meeting/Toronto

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Agenda

• Common needs for debuggers
• Quick look at ATs proprietary solution
• Existing standards/SPIRIT
• Extending SPIRIT for debug use

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Debugger features tied to hw details

• Board/connection information (e.g. JTAG scan
  chain info)
• Registers (native, coprocessor, peripherals)
• Memory maps
• Help building apps/validation
• HW tools (e.g. memory testing, flashing)
• Aid the debugger (e.g. ROM stepping)
• Initialization

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What is SPIRIT missing for debugger use?

• Core internal register information
• Register use information (does reading a register
  change its contents? Important for a debugger!)
• Non-contiguous bitfields?

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Register specific information we need

• id, alternative ids (e.g. R15, R15_irq)
• bit width
• register type (floating point? fixed point?)
• access restrictions (RW)
• access hints/side effects
• volatile contents
• reads are destructive
• writes may change state/invalidate other memory
• dependencies (visibility depends on another
  register/bit field)
• bit fields
• which bits (non-contiguous!?)
• value to text mapping
• formulas/masks for values
• default formatting hints (hex vs decimal)
• access (RW)

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Memory info we need?

• address spaces
• id (Memory, IO,DATA, INST)
• unit size (e.g. 8 bits)
• unit count (e.g. 232)
• Memory maps (core specific/shared)
• region name (DRAM, FLASH)
• space reference
• offset in space (units)
• unit count
• Access flags (RWXV)
• Required access sizes (none, 16 bit write?)
• Memory type (RAM, Flash information)

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What is SPIRIT?

• SPIRIT stands for
• Structure for Packaging, Integrating and
  Re-using IP within Tool flows,
• Standard schema for description of HW IP blocks
• Standard interfaces for IP creation and
  configuration scripts (generators)
• Standard interfaces for flow based Electronic
  Design Automation (EDA) tools

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What is SPIRIT used for today?

• Vendor neutral description of IP blocks for use
  by SoC design tools
• Interconnection of HW IP on an SoC
• Routing of signals between IP blocks
• Cores, peripherals, buses
• Focused on creation of SoC

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What does SPIRIT have that is cool for debugger
vendors?

• Standardized description of memory maps
• Address Spaces
• Buses/bridges between spaces
• Memory mapped registers (peripherals)
• Bit fields within registers
• If it was the memory map used in creation of the
  SoC, it is going to be correct!

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Thank You!
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