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RunIIb Silicon Project

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Mini PC. Mounts. Sensors. 2 sensors hybrid = 1 module. 3 modules per side. 1 MPC per stave ... Connect CF in staves to ground at the mini portcard ... – PowerPoint PPT presentation

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Title: RunIIb Silicon Project


1
RunIIb Silicon Project
  • Successful Lehman Review Sept. 24-26
  • Workshop at LBL 10/23-10/25
  • Wednesday-Thursday
  • hybrids testing and burnin plans
  • status of construction and testing of modules and
    staves
  • contributions and plans for various groups on
    Run IIb
  • Friday (joint with D0)
  • Chip status and schedule
  • Grounding issues

2
Lehman Review Results
  • No Findings
  • Committee was impressed with advance state of
    prototyping
  • Told us to reduce the contingency and increase
    schedule contingency.
  • Additional guidance from Lab has been included
  • we think we have a final schedule
  • Total silicon project cost Now Oct 02
  • 14.3M 5M contingency 19.3M (FY02)
  • was 13.6M 6.6M 20.2M at Lehman Review
  • We are approved as much as possible
  • Run IIb still contingent on accelerator review
  • still have to get through a few external reviews
    of project management issues.

3
Stave conceptual view
  • Cooling tubes
  • 2 sensors hybrid 1 module
  • 3 modules per side
  • 1 MPC per stave
  • 1 readout unit per stave
  • Stave is 66 cm long

Mini PC
Mounts
Chips
Wing Cable
Hybrid Pitch Adapter
Sensors
We now have all components in hand and have made
the first electrical stave!
Mounting holes
4
Silicon Sensors
All detectors are single sided and based on the
high voltage operation layout (CMS,ATLAS,L00)
  • Prototype stereo sensors delivered to Tsukuba
    last week.
  • High yield on axial sensors and high quality (0
    bad channels grade A and 0.07 grade B)
  • characterization of stereo sensors in progress
  • Testing of irradiated axial sensors is in
    progress
  • Production signoff scheduled for Nov. 25th

5
Prototype Stave Assembly
6
1st Electrical Stave
7
SVX4 chip
  • 1st full prototype submission in April 02
  • Chip back in June 02
  • Tested at LBL and FNAL
  • No major problems found
  • Corrections for bow and channel to channel
    variation are in progress
  • Yield looks very good, 85 (but low stats)
  • Next Submission Mid. Jan.

8
Chip Schedule
on critical path
  • Summer submission (preproduction?) has only 10
    days of slack

9
Module
  • Ten modules fully assembled
  • Hybrids work with No problems!
  • Module tests at LBL in progress, Soon will test
    at FNAL (FCC) with full DAQ

10
Pre-prototype stave tests at LBL
  • One module glued to bus cable on carbon fiber
    (top of stave)
  • First results with deadtimeless operation on a
    stave!
  • looks pretty good - many things still to
    optimize, all peaks go away with DPS (RTPS) on
  • Second module sent to LBL and new results will
    come soon

11
Workshop Friday
  • Discussion with chip designers, CDF and D0 about
    chip schedule
  • Two problems are being addressed with next
    submission
  • Bow and channel-channel variations
  • everyone seems to agree on the plan (we meet
    weekly)
  • Simulations at LBL have reproduced the channel to
    channel variations
  • Layout changes are in progress at LBL and FNAL
    Submit mid Jan. 03
  • For next submission two new versions will be
    submitted Min and Max changes. Also the current
    version of the chip will be included for quality
    control
  • Grounding Discussion
  • We are starting to work out plans for grounding
    staves
  • Connect CF in staves to ground at the mini
    portcard
  • Connect stave ground to bulkheads and screens
  • Connection to L0 ground

12
Critical Path Milestones
1st prototypes now-2/03
2nd prototype round 2/03 9/03
preproduction 9/03 3/04
Production 3/04 -3/05
Project complete 7/18/05!
13
Conclusion (1)
  • We have an aggressive schedule, but already most
    of the prototype parts work well.
  • 1st electrical stave is ready for testing!
  • Preprototype stave tests at LBL look good so far
    but just started.
  • Commitments to Run IIb
  • LBL is doing tests with prototype chips, hybrids,
    modules and pseudostaves and is committed to
    providing oversite of Hybrid production
  • Davis is preparing for Hybrid burnin and testing
  • Helsinki is going to send 3 people to LBL for
    9mths this spring and will continue to provide
    support for hybrid assembly, testing and burnin
  • Will need to send more people to LBL/Davis for
    full production efforts
  • Uof I is developing a PC based test stand
  • Uof I and Rutgers are collaborating on Stave
    Burnin
  • Sensor testing at Purdue, UNM, Tsukuba
  • Discussions in progress of other groups We need
    to get MOUs with all the groups

14
Conclusion (2)
  • Completion date is July 18th 2005 our schedule
  • Official completion date with Lab contingency is
    May 31, 2006
  • Could gain time on July 18th date by eliminating
    the 2nd prototype round of DAQ components.
  • L0 is not on the critical path. We want to keep
    it that way.
  • need to have acceptable cables to make progress
    on design
  • We are already scheduling signoff meetings for
    going into production
  • sensors Nov. 25th
  • beampipe flanges done (beampipe is already
    being fabricated)
  • Lab and Sidet are preparing to provide large
    labor force for Run IIb
  • This is a great time to join Run IIb Plenty of
    hardware projects for students and postdocs.
    Come talk to us!
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