Title: Computation with Feedback
1Combinational Circuitswith Feedback
Marc Riedel
Ph.D. Defense, Electrical Engineering, Caltech
November 17, 2003
2Combinational Circuits
Logic Gate
Building Block
3Combinational Circuits
Logic Gate
Building Block
4Combinational Circuits
AND gate
Common Gate
0
0
0
1
5Combinational Circuits
OR gate
Common Gate
0
0
0
0
1
1
1
0
1
1
1
1
6Combinational Circuits
XOR gate
Common Gate
0
0
0
0
1
1
1
0
1
1
1
0
7Combinational Circuits
The current outputs depend only on the current
inputs.
8Combinational Circuits
The current outputs depend only on the current
inputs.
9Combinational Circuits
Generally feed-forward (i.e., acyclic) structures.
10Combinational Circuits
Generally feed-forward (i.e., acyclic) structures.
0
0
1
1
1
1
0
1
1
1
0
11Feedback
How can we determine the output without knowing
the current state?
feedback
12Feedback
How can we determine the output without knowing
the current state?
...
...
?
...
?
?
...
13Feedback
Example outputs can be determined in spite of
feedback.
14Feedback
Example outputs can be determined in spite of
feedback.
0
0
15Feedback
Example outputs can be determined in spite of
feedback.
0
0
0
0
16Feedback
Example outputs can be determined in spite of
feedback.
17Feedback
Example outputs can be determined in spite of
feedback.
1
1
18Feedback
Example outputs can be determined in spite of
feedback.
1
1
1
1
There is feedback is a topological sense, but
not in an electrical sense.
19Feedback
Example outputs can be determined in spite of
feedback.
Admittedly, this circuit is useless...
20Rivests Circuit
Example due to Rivest
21Rivests Circuit
Example due to Rivest
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0
22Rivests Circuit
Example due to Rivest
0
0
0
23Rivests Circuit
Example due to Rivest
0
0
0
24Rivests Circuit
Example due to Rivest
1
1
25Rivests Circuit
Example due to Rivest
1
1
1
26Rivests Circuit
Example due to Rivest
1
1
1
27Rivests Circuit
Example due to Rivest
Addition OR
3 inputs,
6 fan-in two gates.
Multiplication AND
6 distinct functions, each dependent on all 3
variables.
28Rivests Circuit
Individually, each function requires 2 fan-in two
gates
29An equivalent feed-forward circuit requires 7
fan-in two gates.
30Rivests Circuit
A feedback circuit with fewer gates than any
equivalent feed-forward circuit.
31Rivests Circuit
n inputs
2n fan-in two gates,
2n distinct functions.
32Rivests Circuit
a
33Rivests Circuit
34Prior Work
- Kautz first discussed the concept of feedback in
logic circuits (1970). - Huffman discussed feedback in threshold networks
(1971). - Rivest presented the first, and only viable,
example of a combinational circuit with feedback
(1977).
35Prior Work
Stok discussed feedback at the level of
functional units (1992).
X
Y
e.g., add
e.g., shift
G(F(X))
F(G(Y))
Malik (1994) and Shiple et al. (1996) proposed
techniques for analysis.
36Questions
- Is feedback more than a theoretical curiosity,
even a general principle?
- Can we optimize real circuits with feedback?
37Key Contributions
- Efficient symbolic algorithm for analysis (both
functional and timing).
- A general methodology for synthesis.
38Ph.D. Defense
- Present examples with same property as Rivests
circuits.
- Illustrate techniques for analysis.
- Focus on synthesis methodology, examples,
optimization results.
39Example
8 gates
4 inputs
8 distinct functions
not symmetrical
40Examples
, multiple cycles
, 3 inputs
9 gates
, 9 distinct functions
41Example
, 5 inputs
20 gates
, 20 distinct functions.
(stacked Rivest circuits)
42½ Example
(sketch)
Generalization family of feedback circuits ½ the
size of equivalent feed-forward circuits.
43Analysis
- Functional analysis determine if the circuit is
combinational and if so, what values appear.
- Timing analysis determine when the values
appear.
- Contributions
- Symbolic algorithm based on Binary Decision
Diagrams. - Optimizations based on topology (first-cut
method).
44Analysis
Explicit analysis
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0
0
0
0
0
01
02
01
01
02
02
Assume gates each have unit delay.
45Analysis
Explicit analysis
0
0
0
0
0
0
0
1
0
1
0
0
01
02
01
01
02
02
01
11
01
03
02
04
46Analysis
Explicit analysis
0
1
0
1
0
0
01
11
01
03
02
04
n inputs
Exhaustive evaluation intractable.
47Analysis
Symbolic analysis
48Analysis
Symbolic analysis
01
evaluates to 0
02
11
evaluates to 1
12
undefined
49Analysis
Symbolic analysis
01-7
evaluates to 0
08-28
11-10
evaluates to 1
111-21
undefined
range of values
50Synthesis
Design a circuit to meet a specification.
- General methodology optimize by introducing
feedback in the substitution/minimization phase. - Optimizations are significant and applicable to a
wide range of circuits.
51Example 7 Segment Display
Inputs
52Example 7 Segment Display
Output
53Substitution/Minimization
Basic minimization/restructuring operation
express a function in terms of other functions.
(cost 9)
Substitute b into a
(cost 8)
Substitute c into a
(cost 5)
Substitute c, d into a
(cost 4)
54Substitution/Minimization
substitutional set
Þ
target function
Þ
Þ
low-cost expression
55Acyclic Substitution
Select an acyclic topological ordering
56Acyclic Substitution
Select an acyclic topological ordering
a
b
c
d
e
f
g
Cost (literal count) 37
57Acyclic Substitution
Select an acyclic topological ordering
a
b
c
d
e
f
g
Nodes at the top benefit little from substitution.
58Cyclic Substitution
Try substituting every other function into each
function
a
b
c
d
e
f
g
Not combinational!
Cost (literal count) 30
59Cost 37
Acyclic substitution
Upper bound
Cyclic solution?
Cost 34
Unordered substitution
Lower bound
Cost 30
60Cyclic Substitution
Combinational solution
a
b
c
d
e
f
g
Cost (literal count) 34
61Cyclic Substitution
Combinational solution
a
b
c
d
e
f
g
Cost (literal count) 34
topological cycles
62Cyclic Substitution
Inputs x3, x2, x1, x0
0,0,1,0
a
b
c
d
e
f
g
Cost (literal count) 34
no electrical cycles
63Cyclic Substitution
Inputs x3, x2, x1, x0
0,0,1,0
a
b
c
d
e
f
g
Cost (literal count) 34
no electrical cycles
64Cyclic Substitution
Inputs x3, x2, x1, x0
0,0,1,0
a
b
c
d
e
f
g
Cost (literal count) 34
65Cyclic Substitution
Inputs x3, x2, x1, x0
0,0,1,0
a
b
c
d
e
f
g
Cost (literal count) 34
66Cyclic Substitution
Inputs x3, x2, x1, x0
0,0,1,0
a
b
c
d
e
f
g
Cost (literal count) 34
67Cyclic Substitution
Inputs x3, x2, x1, x0
0,1,0,1
a
b
c
d
e
f
g
Cost (literal count) 34
68Cyclic Substitution
Inputs x3, x2, x1, x0
0,1,0,1
a
b
c
d
e
f
g
Cost (literal count) 34
no electrical cycles
69Cyclic Substitution
Inputs x3, x2, x1, x0
0,1,0,1
a
b
c
d
e
f
g
Cost (literal count) 34
no electrical cycles
70Cyclic Substitution
Inputs x3, x2, x1, x0
0,1,0,1
a
b
c
d
e
f
g
Cost (literal count) 34
71Cyclic Substitution
Inputs x3, x2, x1, x0
0,1,0,1
c
a
b
f
a
c
d
d
g
b
e
e
f
g
Cost (literal count) 34
72Synthesis
Strategy
- Allow cycles in the substitution phase of logic
synthesis. - Find lowest-cost combinational solution.
Collapsed
Solution
Cost 13
Cost 17
73Branch and Bound
Break-Down approach
- Exclude edges
- Search performed outside space of combinational
solutions
74Branch and Bound
Build-Up approach
- Include edges
- Search performed inside space of combinational
solutions
75Implementation CYCLIFY Program
- Incorporated synthesis methodology in a general
logic synthesis environment (Berkeley SIS
package). - Trials on wide range of circuits
- randomly generated
- benchmarks
- industrial designs.
- Consistently successful at finding superior
cyclic solutions.
76Benchmark Circuits
Circuit
Inputs
Outputs
Berkeley
Simplify
Caltech
Cyclify
Improvement
dc1
4
7
39
34
12.80
ex6
8
11
85
76
10.60
p82
5
14
104
90
13.50
t4
12
8
109
89
18.30
bbsse
11
11
118
106
10.20
sse
11
11
118
106
10.20
5xp1
7
10
123
109
11.40
s386
11
11
131
113
13.70
dk17
10
11
160
136
15.00
apla
10
12
185
131
29.20
tms
8
16
185
158
14.60
cse
11
11
212
177
16.50
clip
9
5
213
189
11.30
m2
8
16
231
207
10.40
s510
25
13
260
227
12.70
t1
21
23
273
206
24.50
ex1
13
24
309
276
10.70
exp
8
18
320
262
18.10
Cost (literals in factored form) of Berkeley SIS
Simplify vs. Cyclify
77Benchmarks
Example EXP circuit
cost measured by the literal count in the
substitute/minimize phase
Acyclic Solution (Berkeley SIS) cost 320
Cyclic Solution (Caltech CYCLIFY) cost 262
78Discussion
Paradigm shift
- A new definition for the term combinational
circuit a directed, possibly cyclic, collection
of logic gates. - Most circuits can be optimized with feedback.
- Optimizations are significant.
79Current Work
- Implement more sophisticated search heuristics
(e.g., simulated annealing). - Extend ideas to a decomposition and technology
mapping phases of synthesis. - Address optimization of circuits for delay with
feedback.
80Future Directions
Structured Network Representations
Þ
Þ
databases, biological systems,...
81Binary Decision Diagrams
Graph-based Representation of Boolean Functions
- Introduced by Lee (1959).
- Popularized by Bryant (1986).
- compact (functions of 50 variables)
- efficient (linear time manipluation)
Widely used has had a significant impact on the
CAD industry.
82Binary Decision Diagrams
Graph-based Representation of Boolean Functions
1
0
BDDs generally defined as Directed Acyclic Graphs
0
0
1
1
83Binary Decision Diagrams
Short described a cyclic structure for a BDD
variant (1960).
We suggest cycles are a general phenomenon.
0
0
1
0
1
1
84Binary Decision Diagrams
Short described a cyclic structure for a BDD
variant (1960).
We suggest cycles are a general phenomenon.
0
0
1
0
1
1
0
1
0
0
1
0
1
1
85Binary Decision Diagrams
Short described a cyclic structure for a BDD
variant (1960).
We suggest cycles are a general phenomenon.
0
0
1
0
1
1
86Binary Decision Diagrams
Short described a cyclic structure for a BDD
variant (1960).
We suggest cycles are a general phenomenon.
0
0
1
0
1
1
Future research awaits...