8051 Microcontroller -Robomart India

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Block Diagram of 8051 Microcontroller Robomart
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8051 Microcontroller Architecture Core

• This microcontroller covers robomart 8051 core
  Microcontroller architecture which include
  program memory,data memory,PSW,PCON etc.
• As shown in the figure, robomart 8051 core
  consists of the following  8 bit
  processor(CPU)   Extensive Boolean processing
  (Single-bit logic) capabilities  64K Program
  Memory  64K Data Memory  4K bytes Program
  Memory(on chip)  128 bytes of Data RAM( on chip
  )  32 addressable I/O lines, they are
  bidirectional and can be individually   Two
  16-bit timer/counters  Full duplex UART 
  6-source OR 5-vector interrupts structure with
  two priority levels  On-chip clock oscillator

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Microcontroller Development Board
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8051 CISC Based Architecture

• The 8051 is CISC based architecture. It
  follows the Harvard architecture principles of
  memory interface, so has separate program and
  information memory. 16 of the available 32 I/O
  lines are utilized for accessing the outside
  memory. We can get to a maximum of 64KB of
  program and 64 KB information memory remotely. 8
  of the IO lines are utilized as both Address and
  information lines.
• Both the program memory and information
  memories are 64K bytes. Program memory is perused
  only and Data memory is discernable/writable.
  Program Store Enable is the perused strobe signal
  used to get to outside program memory. There are
  RD and WR signals utilized for reading from and
  writing to the outer memory.

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