Title: Embedded Signal Processing
1Embedded Signal Processing
http//www.ece.utexas.edu
November 21, 2003
2On My Way to Austin
- Signals and Systems Pack
- Symbolic analysis of signals and systems in
Mathematica - By product of my PhD work
- On market since 1995
- Ptolemy Classic
- Mixes models of computation
- Untimed dataflow
- Process network
- Discrete-event
- Untimed dataflow synthesis
- Source code powers Agilent Advanced Design System
Rambling Wreck
1987-1993
Cal
1993-1996
3Embedded Signal Processing Lab
- Develop and Disseminate
- Theoretical bounds on signal/image quality
- Optimal and low-complexity algorithms using
bounds - Algorithm suites and fixed-point, real-time
prototypes - Analog/Digital IIR Filter Design for
Implementation - Butterworth and Chebyshev filters are special
cases of Elliptic filters - Minimum order does not always give most efficient
implementation - Control quality factors
4Students Alumni
ADSL/VDSL Transceiver Design
Real-Time Imaging
Ph.D. students Gregory E. Allen (UT Applied
Research Labs)
Serene BanerjeeMS students Vishal
Monga Ph.D. graduates Thomas D. Kite (Audio
Precision) Niranjan
Damera-Venkata (HP Labs)MS graduates Young
Cho (UCLA)
Ph.D. students Dogu Arifler
Ming Ding Ph.D. graduates Güner
Arslan (Cicada) Biao
Lu (Schlumberger)
Milos Milosevic (Schlumberger)
Wireless Communications
Ph.D. students Kyungtae Han
Zukang Shen MS students Ian
Wong (NI Summer Intern) Ph.D. graduate Murat
Torlak (UT Dallas)MS graduates Srikanth K.
Gummadi (TI) Amey A.
Deosthali (TI)
Image Analysis
Ph.D. graduates Dong Wei (SBC Research)
K. Clint Slatton (University
of Florida) Wade C.
Schwartzkopf (Integrity Applications)
Wireless Networking and Comm. Group
http//www.wncg.org
Center for Perceptual Systems http//www.cps.utex
as.edu
5Senior Real-time DSP Lab Elective
- Lab 6 Quadrature Amplitude Modulation
Transmitter
6Senior Real-time DSP Lab Elective
- Deliverable V.22bis Voiceband Modem
- Design of sinusoidal generators, filters, etc.
- Program in C on TI DSP processor using Code
Composer Studio - Test implementation with spectrum analyzers, etc.
- Reference Design in LabVIEW Allows Students To
- Explore communication performance tradeoffs vs.
parameters - See relationships among modem subsystems in block
diagram - LabVIEW DSP Integration Toolkit 2.0 for Spring
2004 - Interacts with Code Composer Studio for real-time
debugging info - Enables all test and measurement to be performed
on desktop PC - Course alumni Prethi Gopinath and Newton Petersen
at NI
7LabVIEW Interface
Control Panel
QAM Passband Signal
Eyediagram
8Multicarrier Modulation
- Divide broadband channel into narrowband
subchannels - No inter-symbol interference if
constantsubchannel gain and ideal sampling - Based on fast Fourier transform (FFT)
- Standardized in ADSL/VDSL (wired)and IEEE
802.11a/g 802.16a (wireless)
DTFT-1
pulse
sinc
w
k
-wc
wc
channel
carrier
magnitude
subchannel
frequency
In ADSL/VDSL, each subchannel is 4.3 kHz wide
andcarries a QAM encoded subsymbol
9ADSL Transceiver Data Transmission
N/2 subchannels
N real samples
S/P
quadrature amplitude modulation (QAM) encoder
mirror data and N-IFFT
add cyclic prefix
P/S
D/A transmit filter
Bits
00110
TRANSMITTER
channel
RECEIVER
N real samples
N/2 subchannels
P/S
time domain equalizer (FIR filter)
QAM demod decoder
N-FFT and remove mirrored data
S/P
remove cyclic prefix
receive filter A/D
invert channel frequency domain equalizer
10Contributions by Research Group
- New Time-Domain Equalizer Design Methods
- Maximum Bit Rate gives an upper bound
- Minimum Inter-Symbol Interference
method(amenable to real-time, fixed-point
implementation) - Minimum Inter-Symbol Interference Method
- Reduces number of TEQ taps by a factor of ten
over Minimum Mean Squared Error method for same
bit rate - Implemented in real-time on Motorola 56300, TI
TMS320C6200 and TI TMS320C5000 DSPs
http//www.ece.utexas.edu/bevans/projects/adsl
11Wireless Multicarrier Modulation
S/P
quadrature amplitude modulation (QAM) encoder
N-point inverse FFT
add cyclic prefix
P/S
D/A transmit filter
Bits
00110
TRANSMITTER
multipath channel
RECEIVER
receive filter A/D
P/S
QAM demod decoder
S/P
remove cyclic prefix
freq. domain equalizer
N-point FFT
Orthogonal frequency division multiplexing (OFDM)
12OFDM Simulation in LabVIEW
- IEEE 802.16a Standard
- Fixed broadband wireless system
- High speed wireless access from home or office
- IEEE 802.16a Simulation
- Physical layer communication
- Realistic channel models
- Channel estimation
- Authored by Alden Doyle, Kyungtae Han, Ian Wong
www.ece.utexas.edu/iwong/Research.htm
13Possible LabVIEW Extensions
- Add communication system design/simulation
support for - Drop down and click to configure communication
building blocks - Multicarrier systems and error control coding
- Performance visualization mechanisms for
communication systems performance analysis (BER
curves, eye diagrams, etc.) - Text-based algorithm design environment
- For quick calculations and parameter calculations
- Implement a text-to-VI translation tool, e.g.
convert math scriptx 110 y fft(x) to a
VI implementation - Improve optimization toolkit
- Make it easier to use
- Add supports for more extensive set of algorithms
14Fixed-Point Wordlength Optimization
- Problem Manual floating-to-fixed
pointconversion for digital hardware
implementation - Design time grows exponentially with number of
variables - Time consuming
- Error prone
- Goal Develop fast algorithm tooptimize
fixed-point wordlengths - Minimize hardware complexity
- Maximize application performance
- Solution Simulation-based search
- Determine minimum wordlength
- Greedy search algorithm
- Complexity-and-distortion measure
Optimum wordlength
Error 1/performance
Complexity
Wordlength(w)
15Wordlength Optimization In LabVIEW
Design
- Use broadband wireless access demodulator design
- Pick four variables and build fixed-point type
- Manually estimate maximum and minimum values of
these variables for integer wordlength
determination - Optimize these variables using Greedy search
algorithm with complexity-and-distortion measure
16Possible LabVIEW Extensions
Design
Max Min IWL
w0 4.8 -4.5 3
W1 3.7 3.7 2
W2 0.8 -0.9 0
- Add fixed-point data type
- Build fixed-point arithmetic operations,
filtering operations, etc. - Estimate implementation complexity as function of
input wordlengths in blocks - Automatically estimate or log max and min values
on arcs - Implement wordlength search algorithms