MODULE 5: Main Memory

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MODULE 5Main Memory
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Type of Main Memory

• 2 main type
• Read Only Memory (ROM)
• contents are not lost
• also called non-volatile memory
• Random Access Memory (RAM)
• contents of memory are lost if the machine is
  switched off
• Also called volatile memory

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Type of ROM

• Programmable ROM (PROM)
• Programmed after manufacture
• Once they are programmed, cannot be changed (One
  Time Programmable)
• Erasable Programmable ROM (EPROM)
• can be erase by exposing to Ultraviolet (UV)
  radiation for a few minutes
• can be reprogrammed
• Electrically Erasable and Programmable ROM
  (EEPROM)
• Erase electrically not UV
• ?No need to take out the IC to erase
• Flash memory
• Erase whole memory electrically

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ROM Usage

• Permanent storage
• Nonvolatile
• Microprogramming (see later)
• Library subroutines
• Systems programs (BIOS)
• Function tables

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TYPE OF RAM

• There are 3 basic types of RAM
• Dynamic RAM (DRAM)
• Commonly used as main memory
• Use capacitor to store data, 1- charged, 0
  discharged
• Capacitor will lose it charge with time ?need to
  recharge (refresh)
• Static RAM (SRAM)
• Using flip-flop to store data no need refresh
• Compare to DRAM faster but more expensive,
• more complex and low capacity
• Non-volatile RAM (NVRAM)
• RAM that is not volatile
• use internal power source to keep data in RAM
  during power off

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Memory Comparison
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Dynamic RAM (DRAM)

• Bits stored as charge in capacitors
• Charges leak
• Need refreshing even when powered
• Simpler construction
• Smaller per bit
• Less expensive
• Need refresh circuits
• Slower
• Main memory
• Essentially analogue
• Level of charge determines value

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Static RAM (SRAM)

• Bits stored as on/off switches
• No charges to leak
• No refreshing needed when powered
• More complex construction
• Larger per bit
• More expensive
• Does not need refresh circuits
• Faster
• Cache
• Digital
• Uses flip-flops

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SRAM v DRAM

• Both volatile
• Power needed to preserve data
• Dynamic cell
• Simpler to build, smaller
• More dense
• Less expensive
• Needs refresh
• Larger memory units
• Static
• Faster
• Cache
• More expensive

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Synchronous DRAM (SDRAM)

• Access is synchronized with an external clock
• Address is presented to RAM
• RAM finds data (CPU waits in conventional DRAM)
• Since SDRAM moves data in time with system clock,
  CPU knows when data will be ready
• CPU does not have to wait, it can do something
  else
• Burst mode allows SDRAM to set up stream of data
  and fire it out in block
• DDR-SDRAM sends data twice per clock cycle
  (leading trailing edge)

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Synchronous DRAM (SDRAM)
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DDR SDRAM

• SDRAM can only send data once per clock
• Double-data-rate SDRAM can send data twice per
  clock cycle
• Rising edge and falling edge

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Main Memory Capacity

• Memory locations/words can be grouped into block.
•  Memory capacity usually measured in bits
• Total no. of memory locations/words size of
  memory word

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Main Memory Capacity Example A

• Main memory is divided into blocks.
• If a memory word is 8 bit and the size of a block
  is 8 words.

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Main Memory Capacity Example A

• What is the capacity of the main memory, if the
  total number of blocks in the memory is 128.
• 128 blocks 8 words 8 bits 27 23 23
  213 1K 8 8 Kbit
•  How many blocks in the main memory if the memory
  capacity is 32 Kbit.
• Total number of words 32 Kbit / 8 bit 215 /
  23 212 words
• Total number of blocks 212 word / 8 words 212
  / 23 29 512 blocks

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Main Memory Capacity Example B

• Main memory contains 8K blocks of 512 words each.
  Each word is 8 bit (1 byte).
• Memory capacity
• 512 8K 4096 Kbytes (4096 Kwords)
• 4096 x 8 Kbit 212 X 23 X 210 bit 25 X 220
  bit 32 Mbit

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Memory Interleaving

• Organize memory chips in modules/banks and issue
  memory requests to all banks at the same time.
• Hence if you buy memory to upgrade you buy a
  Memory Module/Bank.
• Access is more efficient when memory is organized
  into banks of chips with the addresses
  interleaved across the chips
• Low-order interleaving, the low order bits of the
  address specify which memory bank contains the
  address of interest.
• High-order interleaving, the high order address
  bits specify the memory bank/module.

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Memory Interleaving

• Memory Banks/Modules
• Memory usually implemented in module/interleave
  (SIMM and DIMM)
• SIMM is single in-line memory module while DIMM
  is dual in-line memory module. A DIMM (dual
  in-line memory module) is a double SIMM.

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Low-Order Interleaving (LOI)
Address Format
n bits
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Example 1
Memory capacity 64 or 26? no of address bit
6 Total main module/bank 4 or 22 ? 2 bits to
address module/bank No of bits for word in
module/bank 6 2 4 ? module/bank capacity
24 16
Since these are low order bits, therefore its
called LOI
60 M0 4 0
63 M3 7 3
61 M1 5 1
62 M2 6 2
111100
111101
111110
111111
000100 000000
000101 000001
000110 000010
000111 000011
These bits are same in all 4 modules.
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Example 2

• Given a memory address as 29Ch (10 bits) and
  there are 4 memory banks/modules. Determine the
  memory bank/module address and the address of the
  word in the bank/module.
• Memory address 29Ch 1010 0111 00
• There are 4 memory banks/modules ? 22 ? 2 bit for
  the banks/modules address.

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Example 2
No of bits for word in module/bank 10-28,
module/bank capacity is 28 256 Memory
bank/module address 00 Address of the word in
the bank/module 1010 0111 A7h
1111 1111 11b
1111 1111 00b
3FFh
M3 (11)
M2 (10)
M1 (01)
M0 (00)
3FCh
1020
1021
1022
1023
0A7h
000h
003h
0
1
2
3
0000 0000 00b
0000 0000 11b
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Advantages Disadvantages (LOI)

• Advantages
• It produces memory interference.
• Disadvantages
• A failure of any single module would be
  catastrophic to the whole system.

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High-Order Interleaving (HOI)
Address Format
n bits
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Example 3
Memory capacity 64 or 26? no of address bit
6 Total main module/bank 4 or 22 ? 2 bits to
address module/bank No of bits for word in
module/bank 6 2 4 ? module/bank capacity
24 16
Since these are high order bits, therefore its
called HOI
001111
011111
101111
111111
15 M0 0
63 M3 48
31 M1 16
47 M2 32
010001 010000
000001 000000
100001 100000
110001 110000
These bits are same in all 4 modules.
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Example 4

• A main memory has 32 Mwords. There are 16 memory
  banks (modules). Draw the modular memory address
  format if the system is implemented with
  high-order interleaving.
• Main memory has 32 Mwords ? 25 Mwords 25
  220 225
• Therefore main memory address size 25 bits
• 16 memory modules/banks ? 24, module/bank
  address size 4 bits
• Word in the module/bank bits 25 4 21 bits

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Advantages of HOI

• Easy memory extension by the addition of one or
  more memory modules to a maximum of M-1.
• Provides better reliability, since a failed
  module affects only a localized area of the
  address space.
• This scheme would be used w/o conflict problems
  in multiprocessors if the modules are partitioned
  according to disjoint or non-interleaving
  processes( programs should be disjoint for its
  success).

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Disadvantages of HOI

• Scheme will cause memory conflicts in case of
  pipelined, vector processors. The sequentiality
  of instructions and data to be placed in the same
  module. Since memory cycle time is much greater
  than pipelined clock time, a previous memory
  request would not have completed its access
  before the arrival of next request, thereby
  resulting in a delay.
• Process interacting and sharing instructions and
  data in multiprocessor system will encounter
  considerable conflicts.
• This technique is useful only in one single user
  system/ single user multitasking system.

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Error Correction

• Hard Failure
• Permanent defect
• Soft Error
• Random, non-destructive
• No permanent damage to memory
• Detected using Hamming error correcting code

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Error Correcting Code Function