Memory Layout and SLC500 System Addresses

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Memory Layout and SLC500 System Addresses
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Processor Memory Division

• An SLC 500 processor's memory is divided into two
  storage areas. Like two drawers in a filing
  cabinet, one area is for data files and the other
  for program files. Processor memory division and
  file capacity are shown in the following graphic

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Processor Memory Organization
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Program Files

• Program files contain processor information, the
  main ladder program, and other ladder files.
• An SLC 500 processor can contain up to 256
  program files.
• Program files are located in the Program Files
  folder of the RSLogix 500 project tree.

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Program Files
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Program Files

• Program files are assigned as follows
• File 0 always contains system information.
• File 1 is reserved.
• File 2 contains the main ladder file.
• File 3-255 contains other ladder files
  (subroutines).

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Data Files

• Data files contain the status information
  associated with external I/O and all other
  instructions used in the main and subroutine
  ladder program files.
• Data files are located in the Data Files folder
  of the RSLogix 500 project tree.

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Data Files
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• Data Files

• Data file organization
• for SLC-500 controller.

• The data file portion of memory
• stores input and output status,
• processor status, the status of
• various bits and numerical data.

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• Input Table File Operation

• Input module

• Switch Open

• Binary 0 stored

• 0

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• Input Table File Operation

• Input module

• Processor continually
• reads current input
• status and updates
• input image table file

• Switch Closed

• Binary 1 stored

• 1

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• Output Table File Operation

• Output module

• Output OFF

• Processor continually
• activates or deactivates
• output status according
• to output image table
• \file status

• 0

• Status 0

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• Output Table File Operation

• Output module

• Processor continually
• activates or deactivates
• output status according
• to output image table
• file status

• Output ON

• 1

• Status 1

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SLC 500 Software and Hardware Addressing
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SLC 500 Processor Data Storage Units

• The SLC 500 processor stores data in the
  following units of memory
• Bit A digit in the binary radix (0 or 1). A bit
  may represent the state, on or off, of a discrete
  I/O device.
• Word A sequence of 16 bits that is treated as a
  unit. For example, the 16 bits representing the
  16 points of an I/O module comprise one word.
• Element A word or group of words that work
  together as a unit.
• Sub-element Individual words within an element.

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SLC 500 Hardware Address Characteristics

• The address for a real-world device (input or
  output) is directly determined by the module slot
  number and terminal to which the hardware device
  is wired.
• Slot numbers are assigned from left to right,
  beginning with 0. The SLC 500 processor is in
  slot 0.
• A hardware address contains the following
  information
• The module type, either an input (I) or an output
  (O) module
• The slot number (numbered in decimal from 1 to
  30)
• The terminal number (numbered in decimal from 0
  to 15)

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SLC 500 Hardware Address Characteristics
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SLC 500 Output addressing

• O5/0 means that it is a physical output.O5/0
  means that it uses Slot 5 (the 6th physical slot)
  in the rack.O5/0 means that it is the first
  output on the card.

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SLC 500 Input addressing

• I4/0 means that it is a physical input.I4/0
  means that it uses Slot 4 (the 5th slot in the
  rack).I4/0 means that it is the first input on
  the card.

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Internal Coil Addressing

• B30/0 means that it references an internal
  Binary fileB30/0 means that it uses the first
  word in the tableB30/0 means that it is the
  first bit in the word.

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An example of an SLC 500 I/O address is shown in
the following graphic
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Internal Coil Addressing
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SLC 500 Input addressing
24
SLC 500 Output addressing
25
SLC 500 Input addressing
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SLC 500 Output addressing
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• Program Scan
• During each operating cycle, the processor reads
  all
• inputs, takes these values, and energizes or
  de-energizes
• the outputs according to the user program. This
• process is known as a scan.

• I/O scan records status data of input
• devices. Energizes output devices that
• have their associated status bits set to
• ON (1)

• Program scan instructions are
• executed sequentially

• Because the inputs can change at any time, the
  PLC must
• carry on this process continuously.

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• Scan Process

• The scan time indicates how fast the controller
  can react
• to changes in inputs. Scan times vary with
  computer
• model and program content, and length. If a
  controller
• has to react to an input signal that changes
  states twice
• during the scan time, it is is possible that the
  PLC will
• never be able to detect this change.

Scan time may be a concern in high speed operations

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• Scan Process

• Read inputs

• The scan is a
• a continuous
• and sequential
• process

• Run
• program

• Adjusts outputs

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• Data Flow Overview

• Input
• data

• Output
• data

• Input
• image
• table file

• Input
• modules

• Output
• modules

• Output
• image
• table file

• Examine data

• Return results

• Program

• Take some
• action

• Check/compare/examine
• specific conditions

• Lecture PLC Programming Basics MME 486 Fall
  2006 16 of 62

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• Scan Process

• Output
• Module

• Input
• Module

• Output
• device

• Input file

• Output file

• Input
• device

• I3/6

• O4/7

• O4/7

• I3/6

• Program

• When the input is closed, the input module senses
  a voltage and an ON condition (1) is entered into
  the input table bit I3/6

• The processor turns light output O4/7 ON during
  the next I/O scan

• I3/6 O4/7

• During the program scan the processor sets
  instructions I3/6 and O4/7 to ON (1)

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• Scan Patterns

• Horizontal Scanning
• Order

• The processor examines
• input and output
• instructions from the
• first command, top left
• in the program,
• horizontally, rung by
• rung.

• End of ladder

• In addition to the program itself, the scan time
  is also dependent on
• the clock frequency of the processor!

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• PLC Programming Languages
• The term PLC programming language refers to the
  method by which the user communicates information
  to the PLC.

The three most common language structures are ladder diagram language, Boolean language, and functional chart.
The three most common language structures are ladder diagram language, Boolean language, and functional chart. Ladder diagram language
The three most common language structures are ladder diagram language, Boolean language, and functional chart.
Functional chart
Boolean language Functional chart
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• Comparing Programming Language

• PB1 CR1 CR2

• SOL Relay Schematic

• LS1

• SOL

• PB1 CR1 CR2

• Equivalent ladder
• diagram language

• LS1

Equivalent Boolean language
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• Relay-Type Instructions
• The ladder diagram language is basically a
• symbolic set of instructions used to create the
• controller program.
• These ladder instructions symbols are
• arranged to obtain the desired control logic.

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• Examine If Closed (XIC) Instruction

• Symbol Analogous to the normally open relay

• contact. For this instruction we ask
• the processor to EXAMINE IF (the
• contact is) CLOSED or ON (XIC)

• Typically represents any input. Can be a switch
• or pushbutton, a contact from a connected output,
  
• or a contact from an internal output.
• Has a bit-level address which is examined for an
• ON condition.
• The status bit will be either 1 (ON) or 0 (OFF).

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• Examine If Open (XIO) Instruction

• Symbol Analogous to the normally closed

• relay contact. For this instruction we
• ask the processor to EXAMINE IF (the

• contact is) OPEN (XIO).

• Typically represents any input. Can be a switch
  or
• pushbutton, a contact from a connected output,
• or a contact from an internal output.
• Has a bit-level address which is examined for an
  OFF
• condition.
• The status bit will be either 1 (ON) or 0 (OFF).

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• Output Energize (OTE) Instruction

Symbol Analogous to the relay coil. The processor makes this instruction true (analogous to energizing a coil) when there is path of true XIC and XIO instructions in the rung.
Analogous to the relay coil. The processor makes this instruction true (analogous to energizing a coil) when there is path of true XIC and XIO instructions in the rung.

• Typically represents any output that is
  controlled by
• some combination of input logic. Can be a
  connected
• device or an internal output (internal relay).
• If any left-to-right path of input conditions is
  TRUE,
• the output is energized (turned ON).

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• Allen-Bradley SLC-500 Controller Addressing

• Address output terminal O04/6

• Output image table
• file 0

• O04/6
• it address

• Address input terminal I13/12

• Energized
• output

• Input image table
• file 1

• I3/12
• Bit address

• Closed input

• I13

• O4

• User-programmed rung

• 12

• 6

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• PLC Matrix Limitation Diagram

• Max series
• contacts

• No. outputs
• per rung and
• location of the
• output in the rung

• Max parallel
• lines

• There may be limitations to the number of series
  contacts
• instructions, number of parallel lines, and the
  number of outputs and
• their location on the rung.

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• Extending the Number of Series Contacts Using
• an Internal Control Relay

• Internal
• relay coil

• Rung 1

• Rung 2

• Discrete output (requires
• one physical connection
• on the output module)

• Internal relay contact

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• Nested Input and Output Branches

• Input and output branches can be nested to avoid
• redundant instructions and to speed up the
  processor
• scan time.

• A nested branch starts or ends within another
  branch.

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• Nested Contact Program

• A B C

• On some PLC models,
• the programming of a
• nested branch circuit
• cannot be done directly.

• Y

• Nested
• contact

• D

• E

• A B C

• Y

• Reprogrammed to
• obtain the required
• logic.

• Contact
• instruction
• C repeated

• D

• C

• E

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• Nested Input and Output Branches

• Input and output branches can be nested to avoid
• redundant instructions and to speed up the
  processor
• scan time.

• A nested branch starts or ends within another
  branch.

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• Nested Contact Program

• A B C

• On some PLC models,
• the programming of a
• nested branch circuit
• cannot be done directly.

• Y

• Nested
• contact

• D

• E

• A B C

• Y

• Reprogrammed to
• obtain the required
• logic.

• Contact
• instruction
• C repeated

• D

• C

• E