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A compact model for thin SOI LIGBTs:

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Univ. of Napoli, Italy. 3 Cambridge Semiconductor (CamSemi), UK. EU research program ROBUSPIC ... NAPOLI. UNIVERSITY. Differences with Vertical IGBT (1) ... – PowerPoint PPT presentation

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Title: A compact model for thin SOI LIGBTs:


1
A compact model for thin SOI LIGBTs description,
experimental verification and system
application Ettore Napoli1,2, Vasantha
Pathirana1, Florin Udrea1,3,Guillaumme
Bonnet3,Tanja Trajkovic3,Gehan Amaratunga3 1
Dept. of Engineering, University of Cambridge,
UK 2 Dept. Electronic and Telecom. Univ. of
Napoli, Italy 3 Cambridge Semiconductor
(CamSemi), UK
EU research program ROBUSPIC
2
Outline
  • Motivation
  • Thin SOI LIGBT
  • Differences with Vertical IGBT
  • Spice sub-circuit model for LIGBT
  • Model equations
  • Model behavior
  • Half bridge circuit using lateral IGBT
  • Experimental results on flyback circuit
  • Conclusion

3
Motivation
  • Available IGBT circuit models are not suited to
    Lateral IGBT
  • Need for
  • a reliable physical based model for Lateral IGBT
  • usable in various circuit simulators
  • Extension to different LIGBT technologies
  • Important for smart power design

4
Thin SOI Lateral IGBT
  • 600V PT
  • Transparent buffer
  • Source and Drain up to the BOX
  • Current flow is horizontal and 1D

5
Differences with Vertical IGBT (1)
  • Not zero carrier concentration at the collector
    edge for LIGBT

6
IGBT models not suited for LIGBT (1)
  • Total charge and charge profile
  • LIGBT
  • Vertical IGBT

7
Differences with Vertical IGBT (2)
  • Depletion width vs. reverse voltage is influenced
    by 2D effects

8
IGBT models not suited for LIGBT (2)
  • Voltage rise at turn-off is faster due to lower
    charge in the epilayer and slower depletion width
    expansion

9
IGBT models not suited for LIGBT (3)
  • Important effects such as the voltage bump,
    resulting in a delay in the turn-off, are not
    considered

10
Spice sub-circuit model for LIGBT
Currents and voltages Epilayer
charge equation
11
Spice sub-circuit model for LIGBT
  • Vj Emitter junction
  • Vdrift Depends on the injected carriers
  • analytic solution
  • Vmos Mosfet (level 1)

12
Spice sub-circuit model for LIGBT
  • IN(W) Electron current through the level 1
    Mosfet

13
Spice sub-circuit model for LIGBT
  • IP(W) Bipolar hole current

14
Spice sub-circuit model for LIGBT
  • IN(0) Electron current through the emitter
    junction

15
Spice sub-circuit model for LIGBT
  • IPC_TRN Transient current due to charge
    sweep-out

16
Base charge equation
  • IN(W) is the MOSFET current
  • IN(0) is the emitter edge electron current
  • IPC_TRN is the charge sweep out current
  • The last term is for the recombination in the
    base

17
Other model features
  • Carrier concentration dependent mobility model
  • Gate-Source Drain-Source and Gate-Drain
    capacitances are implemented
  • Physical based model with 13 parameters

18
Model behavior
Expanded for I1A, V200V
Inductive Turn-off
19
Model behavior
  • Toff Energy vs. Von as a function of lifetime

20
Half bridge circuit
  • Output characteristics
  • 200V 2A 100kHz

21
Experimental results on flyback circuit
22
Experimental results on flyback circuit
23
Flyback circuit simulation
  • Complete flyback circuit
  • The simulated waveforms are for the primary
    winding voltage (green) and the load voltage
    (red)

24
Conclusion
  • A physical based circuit model for Lateral IGBT
  • Implemented in Spice
  • Compared against
  • Device numerical simulation
  • Complex SMPS simulation
  • Experimental results
  • Extendable to Thick SOI and JI-LIGBT
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