Title: Y. Chauhan, F. Krummenacher and A. M. Ionescu
1Progress and update in HV-EKV Model
Y. Chauhan, F. Krummenacher and A. M.
Ionescu Ecole Polytechnique Fédérale de Lausanne
(EPFL), Switzerland
http//legwwww.epfl.ch
2Outline
- HV-EKV
- status and people
- short comment on evaluation feedback
- New validations
- model validation on SOI-LDMOS (AMIS)
- demonstration of quasi-saturation modeling on
VDMOS (AMIS) - NEW Modeling of Lateral Non-uniform doping in
HVMOS (see IEDM06 paper)
3HV-EKV (1)
EKV Simple, physically based parameters Less
parameters than BSIM HVEKV EKV low voltage
Rdrift charge (Vk)
4HV-EKV (2) scalable drift resistance
5HV who _at_ EPFL?
Electronics Laboratory (50 people, 4 profs, 24
PhDs)
- Yogesh Chauhan (100)
- Francois Krummenacher (EKV team, 25)
- Costin Anghel (now with CEA, France)
- Adrian M. Ionescu, prof. (10)
- Michel Declercq, prof. (10)
High Voltage MOS modeling a strategic field but
not our mainstream research à reorganization
needed if HV-EKV adopted by CMC
6HV-EKV status and feedback
- Status corrected code released to CMC and
evaluations in progress - Feedback simplicity, ease of extr, doc
- Accuracy problem in quasi-saturation -
- Accuracy with temperature -
- Relatively slow because of Verilog A
- Compared with sub-circuit models evaluators
agree its a compact model!
In fact needs appropriate tunning
7Problem with quasi-saturation?
- Tune avsat quasi-sat for LDMOS and VDMOS!
?
!
8Model Validation on SOI-LDMOS (1)
- Very accurate on both ID-VG and gm-VG _at_ low VD
9Model Validation on SOI-LDMOS (2)
- Good accuracy on both ID-VG and gm-VG _at_ high VD
10Model Validation on SOI-LDMOS (3)
- quasi-saturation very well modeled
- good/acceptable accuracy on gds-VD
11Quasi-Saturation Modeling on VDMOS
- in contrast with some criticism the model is
able to accurately describe the quasi-saturation
region of VDMOS
12New model extension
- Model of LAteral Non-Uniform Doping in the
intrinsic MOSFET (new EKV-like model for the low
voltage transistor) - Verilog A code not yet available
- Evaluated with Matlab code on both numerical
simulations and experimental data - Reported in IEDM 2006
13Why LAMOS modeling?
14Modeling of Lateral Non-uniform doping in
HV-MOSFET
Assume
Nonlinear ODE
Drain Current
Not explicit
Total Inversion Charge Density
15Model Validation on 50V VDMOS
Transfer Characteristics (ID-VG)
- Weak inversion to Strong inversion transition
- Subthreshold slope correctly matched
- Good accuracy
16 gm-VG for VD0.1-0.5V
- Subthreshold slope correctly matched
- Descending slope drift resistance
17Output Characteristics
Self-Heating
Impact-Ionization
- Linear region correctly modeled by drift
resistance. - Self Heating Effect
- Peaks on gds
18Gate-to-Drain Capacitance CGD vs VG
- Slope Peaks effect of lateral non-uniform
doping
- Sharp decrease effect of drift region (good
modeling of drift region or VK must)
19 CGSCGB vs VG
- Peaks effect of lateral non-uniform doping
- Sharp decrease and shift of peaks effect of
drift region
20CGG vs VG
- Peaks and shift of peaks little contribution
from lateral non-uniform doping and greater
contribution from drift region
21Conclusion
- General HV-MOS Model including lateral
non-uniform doping (code will be available in
March 2007) - Complex capacitance behavior of high voltage MOS
was explained using numerical device simulations - A new model for lateral non-uniformly doped
devices was presented - Self-Heating effect included
- Very good performance in DC and transient
operations - Model validated on industrial devices VDMOS and
LDMOS - Peaks and shift of peaks in capacitances with
bias correctly modeled
22Acknowledgements
Christian Maier, Heinisch Holger Robert Bosch,
Germany Andre Baguenier Desormeaux Cadence
Design Systems, France B. Desoete AMI
Semiconductor, Belgium J.-M. Sallesse, A.S.
Roy EPFL, Switzerland
Funded by European Commission project
ROBUSPIC Website- http//www-g.eng.cam.ac.uk/rob
uspic/