RISC

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RISC

• By
• Don Nichols

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Contents

• Introduction
• History
• Problems with CISC
• RISC Philosophy
• Early RISC
• Modern RISC

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Introduction
What is RISC? Not a game of world domination RISC
stands for Reduced Instruction Set Computer

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Introduction
RISC is opposite of CISC which stands for Complex
Instruction Set Computer
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IntroductionSome Examples of RISC

• MIPS Found in SGI computers and Nintendo 64
• IBMs POWER series used in all of their minis and
  mainframes
• Suns SPARC and UltraSPARC machines
• Hewlett-Packards PA-RISC HP/PA
• DEC Alpha
• Palm, Inc. PDAs (originally used CISC)

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History Pre-RISC
Before compiler technology existed, programming
was done in either machine code or Assembly
language. Computer architects, to make some of
the programming easier, created very complex
instructions which were direct representations of
high level functions of high level programming
languages. The current attitude was that since
hardware design was simpler than compiler design,
it was the hardware that was made complex.
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History Pre-RISC
Small memory sizes were also a big factor in the
design of complex instructions. With memory being
so small, instructions were designed to carry out
multiple tasks, such as data movement and data
calculation. Not only were instructions designed
to do multiple tasks, but also, different
versions were written for different variations of
the tasks i.e. one version that added two numbers
would store the result in memory and another
version would store the result in a register.
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History Pre-RISC
The general goal at the time was to provide
every possible addressing mode for every
instruction, a principle known as
"orthogonality." This led to some complexity on
the CPU, but in theory each possible command
could be tuned individually, making the design
faster than if the programmer used simpler
commands. This concept of overloading each
instruction came to be known as CISC.
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Problems with CISC

• In the late 1970s, research showed that many of
  the orthogonal addressing modes were being
  ignored by most programs
• This was due to the increased use of compilers
  and the decrease in use of assembly language

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Problems with CISC

• Another problem was that chip designers didnt
  have time to tune every instruction
• Only the most used instructions were tuned
• Resulted in the other instructions running slower
  than a series of smaller instructions performing
  the same task

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Problems with CISC

• CPUs were rapidly becoming faster than the
  memory they dealt with
• This lead to a need for more registers (and
  later, cache as well)
• The board space needed to accommodate these
  additions could be gained by reducing the
  complexity of the CPU

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RISC Philosophy

• Reduce the size of the instruction set (hence the
  name)
• Implement code as a series of simple instructions
  instead of one complex instruction

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RISC Philosophy

• This leaves more room in the instruction itself
  to carry data with it
• This reduced the need to use registers or memory,
  which meant the memory interface could be simpler
  allowing it to be tuned

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RISC PhilosophyExample

• Andrew Tanenbaum showed that 98 of all constants
  in a program could be stored in 13 bits
• By having a smaller instruction, these constants
  could be stored right there in the instruction

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RISC PhilosophyExample

• By storing numbers right inside the instruction
  it increases the speed of execution by reducing
  the number of accesses to registers and memory

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RISC PhilosophyDrawbacks

• A series of instructions is needed for even
  simple tasks
• The total number of instructions that are read
  from memory is larger and thusly takes longer

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Early RISC

• First computer that would be known as RISC was
  the CDC 6600 supercomputer, designed by Seymour
  Cray in 1964
• Designed as a number crunching CPU

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Early RISC

• Only had 74 op-codes as opposed to the 400
  op-codes on the 8086
• Had a load/store architecture with only two
  addressing modes
• Had 11 pipelined functional units for arithmetic
  and logic, plus 5 load units and 2 store units

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Early RISC

• RISC evolved from two projects
• UC Berkleys RISC project
• Stanfords MIPS project

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Early RISCBerkleys RISC project

• Started in 1980
• Directed by David Patterson
• Idea was to gain performance with pipelining and
  the use of register windows

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Early RISCWhat is a register window?

• Normal CPU has small number of registers that can
  be used at any time
• A CPU with windows has many registers but a
  program can only access a few of them at a time
• Allows fast procedure calls by letting the call
  and return move the window to the set of
  registers used by that procedure

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Early RISCRISC - I

• The RISC project brought the RISC I processor
  in 1982
• Had only 44,420 transistors (compared to the
  average 100,000 in current CISC designs
• Had only 32 instructions
• Out performed all other single-chip designs

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Early RISCRISC - II

• The RISC II came in 1983
• Had 39 instructions
• 40,760 transistors
• Over 3 x as fast as RISC I

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Early RISCStanfords MIPS project

• Microprocessor w/o Interlocked Pipeline Stages
• Started by John Hennessy in 1981
• Main focus was the pipeline, running it as full
  as possible
• Far faster than other pipeline designs

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Early RISCStanfords MIPS project

• All instructions in this design must complete in
  one cycle
• This requirement unfortunately disqualified
  instructions such as multiply and divide which
  took more than one cycle to execute
• Accounted for with a special pair of HI/LO
  registers that had hardware interlocks

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Modern RISC

• Almost all modern RISC processors are copies of
  the RISC II design
• Suns success with RISC chips in their SPARC
  machines showed that the benefits of RISC were
  real

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Modern RISC

• John Hennessy left Stanford and started MIPS
  Computer Systems
• Their MIPS chips are one of the most common among
  embedded processors used in high end applications
• The entire mainframe world is now completely RISC
  based

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Modern RISCThings to note

• Some say RISC is now a meaningless term, why?
• Current RISC architectures have grown and some
  instructions are not all that reduced (most of
  which are related to graphics)
• Also, CISC designers have adopted some of the
  RISC philosophies in order to streamline their
  CPUs

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Modern RISCThings to note

• Because of this convergence in design, some feel
  that the distinction of RISC vs. CISC no longer
  has meaning
• RISC is more accurately described today as
  load-store
• CISC is more accurately described as
  register-memory

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References

• http//en.wikipedia.org/wiki/RISC
• http//www.webopedia.com/TERM/R/RISC.html
• http//www.hyperdictionary.com/dictionary/Micropro
  cessorwithoutInterlockedPipelineStages