EECS 20

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State Machines
EECS 20 Lecture 8 (February 2, 2001) Tom
Henzinger
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Finite-Memory Systems
Discrete-Time Delay remember
last input value Discrete-Time Moving Average
remember last 2 input values Parity
remember if number of
past inputs true is even
Infinite-Memory Systems
Count remember if number of past
inputs true is greater than number of
past inputs false

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Parity
t, t, t, f, f, t, t,
t, f, t, f, f, f, t,
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The Parity System
Parity Nats0 ? Bools ? Nats0 ? Bools
such that ? x ? Nats0 ? Bools , ? y ?
Nats0 , ( Parity (x) ) (y)
true if trueValues (x,y) is even
false if trueValues (x,y) is odd

where trueValues (x,y) z ? Nats0 z lt y ? x
(z) true
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Count
t, t, f, f, f, t, t,
t, t, t, t, t, f, t,
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The Count System
Count Nats0 ? Bools ? Nats0 ? Bools
such that ? x ? Nats0 ? Bools , ? y ?
Nats0 , ( Count (x) ) (y)
true if trueValues (x,y) ?
falseValues (x,y) false if
trueValues (x,y) lt falseValues (x,y)

where falseValues (x,y) z ? Nats0 z lt y ?
x (z) false
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An Implementation of the Parity System
Bools
?
Dt
Bools
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An Implementation of the Parity System
f
t
t, f, t,
Dt
t
?
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An Implementation of the Parity System
f
f
t, f, t,
?
t, f
Dt
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An Implementation of the Parity System
t
f
t, f, t,
?
t, f, f
Dt
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An Implementation of the Parity System
t
t, f, t,
?
t, f, f, t
Dt
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An Implementation of the Parity System
t
t, f, t,
?
t, f, f, t
Dt
Memory state of the system
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Systems with finite memory are naturally
implemented as finite state machines ( or finite
transition systems ) .
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An Implementation of the Count System
Ints
Ints
Bools
pos

D0
Bools
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Bools ? Ints ? Ints such that ? x ?
Bools, ? y ? Ints, (x,y)
y1 if x true y-1 if x
false

pos Ints ? Bools such that ? x ? Ints,
pos (x)
true if x ? 0 false if x lt 0

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An Implementation of the Count System
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t, t, t,
pos

D0
t, t, t, t
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An Implementation of the Count System
3
t, t, t,
pos

D0
t, t, t, t
infinite state
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Systems with countable ( integer ) memory are
naturally implemented as infinite state
machines ( or infinite transition systems ) .
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( Systems with uncountable ( real ) memory, such
as continuous-time delay, are not naturally
viewed naturally as transition systems. )
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A Discrete-Time Reactive System
F
Nats0 ? Inputs
Nats0 ? Outputs
F Nats0 ? Inputs ? Nats0 ? Outputs
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State-Based Implementation
F
2
2
Update
Nats0 ? Inputs
Nats0 ? Outputs
1
1
Dc
Nats0 ? States
Nats0 ? States
Update memory-free Memory States
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State Implementation
F
2
2
Update
Nats0 ? Inputs
Nats0 ? Outputs
1
1
Dc
Nats0 ? States
Nats0 ? States
update States ? Inputs ? States ? Outputs c
? States ( initial state )
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State Implementation of the Parity System
Inputs Bools Outputs
Bools States Bools initialState
true update States ? Inputs ? States ?
Outputs such that ? q ? States, ? x ?
Inputs, update (q,x) 1
( q ? x ) update
(q,x) 2 q
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State Implementation of the Count System
Inputs Bools Outputs
Bools States Ints initialState
0 update States ? Inputs ? States ?
Outputs such that ? q ? States, ? x ?
Inputs, update (q,x) 1
(x,q) update (q,x)
2 pos (q)
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A State Machine
Inputs ( set of possible input values
) Outputs ( set of possible output values
) States ( set of states )
initialState ? States update States ? Inputs
? States ? Outputs
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A state machine is finite iff States is a finite
set.
Parity can be implemented by a two-state
machine. Count cannot be implemented by
finite-state machine.
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Discrete-Time Reactive Systems

Every memory-free system can be implemented by a
one-state machine. Every causal system can be
implemented by a state machine ( take as state
the entire history of inputs ), and every system
that can be implemented by a state machine is
causal.
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The Block Diagram of a State Machine
2
2
Update
Nats0 ? Inputs
Nats0 ? Outputs
1
1
DinitialState
Nats0? States
Nats0? States
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The Transition Table of a Finite-State Machine (
Parity )
Current state Input Next state
Output true true
false true true
false true true
false true true
false false false
false false
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The Transition Diagram of a State Machine (
Parity )
true / true
true
false
true / false
false / false
false / true
States Bools Inputs Bools Outputs
Bools