BINARY ARITHMETIC SUMMARY

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BINARY ARITHMETIC SUMMARY SIGNED UNSIGN
ED Range -(2(n-1), 2(n-1)
1 Range 0, (2n) 1 n number of bits
in register Two's complement -A not(A)
1 Conditional bits Z, N, C, V Conditional
bits Z, C Overflow (V bit) Overflow (C
bit) Sign (A) Sign (B) ! Sign (Result) - gt V
1 C MS bit 1 EXAMPLE (4 bits) EXAMPLE
(4 bits) V C C 0 1 1 1 (7) 0 1 1 1
(7) 0 0 1 0 (2) 0 0 1 0
(2) -------- --------- 1 0 1 0 0 1 (-7,
9) 0 1 0 0 1 (9) ----------------------------
---------------------------------- -------------
------------------------------------ 1 1 1 1
(-1) 1 0 1 0 (10) 1 0 0 0 (-8) 0 1 1 1
(7) --------- ---------- 1 1 0 1 1 1 (7,
-9) 1 0 0 0 1 (1, 17)
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• SIGNED NUMBER BRANCH CONDITIONS
• BL- Branch on less (N xor V) 1
• N V N xor V
• 0 0 0
• 0 1 1
• 1 0 1
• 1 1 0
• I CMP (8, 2) 0 1 0 0 0 (8)
• 1 1 1 1 0 (-2)
• V C -----------
• 0 1 0 1 1 1 0
• V 0, N 0 -gt N xor V 0
• II CMP (-8, 2) 1 0 0 0 0 (-8)
• 1 1 1 1 0 (-2)
• V C -----------
• 1 1 0 1 1 1 0

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• SIGNED NUMBER BRANCH CONDITIONS CONT.
• BG- Branch on greater Z or (N xor V) 0
• N V N xor V Z Z or (N xor V)
• 0 0 0 0 0
• 0 1 1 1 1
• 1 0 1 0 1
• 1 1 0 1 1
• I CMP (8, 2) 0 1 0 0 0 (8)
• 1 1 1 1 0 (-2)
• V C -----------
• 0 1 0 1 1 1 0
• Z 0, V 0, N 0 -gt Z or (N xor V) 0
• II CMP (-8, 2) 1 0 0 0 0 (-8)
• 1 1 1 1 0 (-2)
• V C -----------
• 1 1 0 1 1 1 0

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