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Pengantar Organisasi Komputer

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Gate Delay. Waktu yang dibutuhkan output suatu gerbang logika berubah ... Pertukaran Data Antar-Register: Input & Output Gating. 1 bit line of common bus. Zin ... – PowerPoint PPT presentation

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Title: Pengantar Organisasi Komputer


1
IKI10230Pengantar Organisasi KomputerBab 7
Datapath
Sumber1. Hamacher. Computer Organization, ed-5.
21 Mei 2003 Bobby Nazief (nazief_at_cs.ui.ac.id)Qoni
ta Shahab (niet_at_cs.ui.ac.id) bahan kuliah
http//www.cs.ui.ac.id/kuliah/iki10230/
2
Prosesor Control Datapath
3
Organisasi Prosesor (Single-bus)
Control Unit
DatapathUnit
4
Siklus Eksekusi Instruksi
  • Eksekusi instruksi yang ukurannya tetap
  • do
  • 1. IR ? MPC // Fetch instruksi
  • 2. PC ? PC d // Tunjuk ke lokasi instruksi
    berikutnya
  • 3. Eksekusi instruksi
  • while (!stop)
  • Eksekusi instruksi yang ukurannya bervariasi
  • do
  • do // Fetch instruksi
  • IR ? MPC
  • PC ? PC d
  • while (!end-of-instruction)
  • Eksekusi instruksi
  • while (!stop)

5
Operasi-operasi Dasar Waktu Eksekusi
  • Operasi-operasi Dasar
  • Mengambil (fetching) Data dari Memori
  • Menyimpan (storing) Data ke Memori
  • Pertukaran Data Antar-Register
  • Operasi Aritmatika Logika di Datapath
  • Waktu Eksekusi
  • Gate Delay
  • Waktu yang dibutuhkan output suatu gerbang logika
    berubah sesuai kondisi inputnya
  • Registers Delay
  • Waktu yang dibutuhkan isi register berubah sesuai
    inputnya

6
Mengambil Data dari Memori
  • Instruksi
  • LD R2,(R1) R2 ? MR1
  • Langkah-langkah
  • MAR ? R1
  • Read
  • Tunggu sinyal MFC// MFC Memory Function
    Completed// Pada saat MFC aktif// MDR ? MMAR
  • R2 ? MDR

7
Menyimpan Data ke Memori
  • Instruksi
  • ST (R1),R2 MR1 ? R2
  • Langkah-langkah
  • MAR ? R1
  • MDR ? R2, Write
  • Tunggu sinyal MFC// MFC Memory Function
    Completed// Pada saat MFC aktif// MMAR ? MDR

8
  • Pengendalian Transfer Data
  • Dari/Ke Register

9
Pertukaran Data Antar-Register Input Output
Gating
operasi tulis baca dilakukan secara bergantian
memungkinkan peranti lain menggunakan bus
Operasi Baca
Operasi Tulis
Zout Q output 0 X 3-state 1 1 1
1 0 0
  • 1-bit bus Zin Q
  • X 0 Q
  • 0 1 0
  • 1 1 1

10
Pertukaran Data Antar-Register
R1in
  • Instruksi
  • MOV R4,R1 R4 ? R1
  • Langkah-langkah
  • Enable output of R1// setting R1out to 1
  • Enable input of R4 // setting R4in to 1

X
R1
X
R1out
R4in
X
R4
X
R4out
11
Operasi Aritmatika dan Logika
  • Instruksi
  • ADD R1,R2 R1 ? R1 R2
  • Langkah-langkah
  • R1out, Yin
  • R2out, Add, Zin
  • Zout, R1in

12
  • Waktu Eksekusi

13
Waktu Eksekusi Gate Delay
  • When input 0 ? 1, output 1 ? 0 but NOT instantly
  • Output goes 1 ? 0 output voltage goes from Vdd
    (5v) to 0v
  • When input 1 ? 0, output 0 ? 1 but NOT instantly
  • Output goes 0 ? 1 output voltage goes from 0v to
    Vdd (5v)
  • Voltage does not like to change instantaneously

Voltage
1 gt Vdd
0 gt GND
Time
14
Waktu Eksekusi Series Connection
Vdd
V1
Vin
G1
G2
G1
G2
C1
Voltage
Vdd
V1
Vout
Vin
Vdd/2
d1
d2
GND
Time
  • Total Propagation Delay Sum of individual
    delays d1 d2
  • Capacitance C1 has two components
  • Capacitance of the wire connecting the two gates
  • Input capacitance of the second inverter

15
Waktu Eksekusi Registers Delay
Clk
  • Setup Time Input must be stable BEFORE the
    trigger clock edge
  • Hold Time Input must REMAIN stable after the
    trigger clock edge
  • Clock-to-Q time
  • Output cannot change instantaneously at the
    trigger clock edge

16
Waktu Eksekusi
R2out, Add, Zin
Turn-on time for 3-state driver
Transmission time
Propagation delay through ALU
Setup time
Hold time
17
  • PR no. 5

18
PR no. 5 batas waktu ? 4 Juni 2003
  • 7.3
  • 7.5
  • 7.10
  • 7.11
  • 7.24

19
  • Langkah-langkah
  • Pengeksekusian Instruksi

20
Operasi (AL) Bagian dari Pertukaran Data
  • Komponen-komponen Datapath
  • Register tempat penyimpanan data
  • ALU tempat pemrosesan aritmatika logika
  • Bus penghubung antar-register antara
    register-ALU
  • Eksekusi Instruksi merupakan kombinasi pertukaran
    data antara
  • Register ? Bus ? Register
  • Register ? Bus ? ALU
  • Register ? Bus ? Memori
  • Pertukaran data dilakukan dengan cara
    mengaktifkan gerbang-gerbang register dengan
    menggunakan sinyal-sinyal kendali (PCout, PCin,
    dst.)
  • Selain itu, juga ada sinyal-sinyal kendali yang
    berhubungan dengan komponen-komponen lain
    (Memori Read, Write ALU Add, Sub, Set
    Carry-in, dst.)

21
Tahapan Eksekusi Instruksi
  • Instruksi
  • Add R1,(R3) R1 ? R1 MR3
  • Langkah-langkah
  • Fetch instruksi
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Fetch operand 1 (isi lokasi memori yg ditunjuk
    oleh R3)
  • R3out, MARin, Read
  • R1out, Yin, WMFC
  • Lakukan operasi penjumlahan
  • MDRout, Add, Zin
  • Simpan hasil penjumlahan di R1
  • Zout, R1in, End

22
1. Fetch instruksi
  • PCout, MARin, Read, Clear Y, Set carry-in to
    ALU, Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin

Control lines
Address lines
Data lines
00000000
Add
1
Carry-in
PC1
23
2. Fetch operand 1
  • R3out, MARin, Read
  • R1out, Yin, WMFC

Address lines
Data lines
24
3. Lakukan operasi penjumlahan
  • MDRout, Add, Zin

Address lines
Data lines
Add
Carry-in
Zin
25
4. Simpan hasil penjumlahan
  • Zout, R1in, End

Address lines
Data lines
26
Tahapan Eksekusi Branching
  • Unconditional (JMP Loop)
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • PCout, Yin
  • Offset-field-of-IRout, Add, Zin // PC ? PC
    Offset
  • Zout, PCin, End
  • Conditional (contoh BRNeg Loop)
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • PCout, Yin , If N0 then End // take the branch?
  • Offset-field-of-IRout, Add, Zin // PC ? PC
    Offset
  • Zout, PCin, End

27
  • LD Rd,X

28
Tahapan Eksekusi Instruksi LD Rd,X
  • Instruksi
  • LD R16,X R16 ? MX
  • Langkah-langkah
  • Fetch instruksi
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Fetch operand dari lokasi memori yang ditunjuk
    oleh X
  • Xout, MARin, Read
  • WMFC
  • Lakukan operasi ALU
  • Simpan hasil penjumlahan di R16
  • MDRout, R16in, End

29
Tahapan Eksekusi Instruksi LD Rd,X
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Xout, MARin, Read
  • WMFC
  • MDRout, R16in, End

Control lines
Read
Address lines
PCout
MARin
Data lines
Clear Y
00000000
Add
1
Set Carry-in
PC1
Zin
30
Tahapan Eksekusi Instruksi LD Rd,X
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Xout, MARin, Read
  • WMFC
  • MDRout, R16in, End

Control lines
WMFC
Address lines
PCin
Data lines
Zout
31
Tahapan Eksekusi Instruksi LD Rd,X
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Xout, MARin, Read
  • WMFC
  • MDRout, R16in, End

Control lines
Address lines
Data lines
32
Tahapan Eksekusi Instruksi LD Rd,X
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Xout, MARin, Read
  • WMFC
  • MDRout, R16in, End

Control lines
Read
Address lines
Data lines
33
Tahapan Eksekusi Instruksi LD Rd,X
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Xout, MARin, Read
  • WMFC
  • MDRout, R16in, End

Control lines
WMFC
Address lines
Data lines
34
Tahapan Eksekusi Instruksi LD Rd,X
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Xout, MARin, Read
  • WMFC
  • MDRout, R16in, End

Control lines
Address lines
Data lines
35
  • ADD Rd,Rs

36
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • Instruksi
  • ADD R16,R17 R16 ? R16 R17
  • Langkah-langkah
  • Fetch instruksi
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • Fetch operand ke-1 (R16)
  • R16out, Yin
  • Fetch operand ke-2 (R17) dan Lakukan operasi ALU
  • R17out, Add, Zin
  • Simpan hasil penjumlahan di R16
  • Zout, R16in, End

37
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • R16out, Yin
  • R17out, Add, Zin
  • Zout, R16in, End

Control lines
Read
Address lines
PCout
MARin
Data lines
Clear Y
00000000
Add
1
Set Carry-in
PC1
Zin
38
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • R16out, Yin
  • R17out, Add, Zin
  • Zout, R16in, End

Control lines
WMFC
Address lines
PCin
Data lines
Zout
39
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • R16out, Yin
  • R17out, Add, Zin
  • Zout, R16in, End

Control lines
Address lines
Data lines
40
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • R16out, Yin
  • R17out, Add, Zin
  • Zout, R16in, End

Control lines
Address lines
Data lines
41
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • R16out, Yin
  • R17out, Add, Zin
  • Zout, R16in, End

Control lines
Instruction Decoder
PC1
Address lines
MAR
IR
Data lines
MDR
R17
YR16
R16
ALU
Z
TEMP
42
Tahapan Eksekusi Instruksi ADD Rd, Rs
  • PCout, MARin, Read, Clear Y, Set carry-in to ALU,
    Add, Zin
  • Zout, PCin, WMFC
  • MDRout, IRin
  • R16out, Yin
  • R17out, Add, Zin
  • Zout, R16in, End

Control lines
Address lines
Data lines
43
  • Peningkatan Kinerja Prosesor

44
Multiple-bus salah satu cara peningkatan kinerja
Add R1,R2,R3 R1?R2R3
45
Bandingkan dengan Organisasi Single-bus
Add R1,R2,R3 R1?R2R3
46
Beberapa Teknik Peningkatan Kinerja Prosesor
Lainnya
  • Pre-fetchinginstruksi berikutnya (i1) di-fetch
    pada waktu pengeksekusian instruksi (i)
  • Perlu teknik Branch Prediction
  • Pipeliningeksekusi instruksi dipecah kedalam
    tahap-tahap yang dapat dilakukan secara overlap
  • Fetch Instruksi
  • Decode Instruksi
  • Baca Operand (dari register asal)
  • Lakukan Operasi
  • Tulis Hasil (ke register tujuan)
  • On-chip Cachemempercepat akses data dari/ke
    memori

47
Arsitektur Intel P6 (Pentium Pro)
48
Arsitektur SPARCstation20
  • TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20

MBus Module
SuperSPARC
Floating-point Unit
L2
CC
DRAM Controller
Integer Unit
MBus
MBus control M-S Adapter
L64852
Inst Cache
Ref MMU
Data Cache
STDIO
SBus
serial
kbd
SCSI
Store Buffer
SBus DMA
mouse
Ethernet
audio
RTC
Bus Interface
SBus Cards
Boot PROM
Floppy
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