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Device Research Conference, 2005

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Department of Electrical and Computer Engineering. University of California, Santa Barbara, CA, 93106-9560 ... IEEE Electron Device Letters, Vol. 26, Jan 2005 ... – PowerPoint PPT presentation

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Title: Device Research Conference, 2005


1
Device Research Conference, 2005
In0.53Ga0.47As/InP Type-I DHBTs having 450 GHz
f? and 490 GHz fmax with Ccb / Ic ? 0.38 ps/V
Zach Griffith and Mark Rodwell Department of
Electrical and Computer Engineering University of
California, Santa Barbara, CA, 93106-9560 Xiao-Mi
ng, Dmitri Loubychev, Ying Wu, Joel Fastenau, Amy
W.K. Liu 119 Technology Drive, Bethlehem, PA
18015 griffith_at_ece.ucsb.edu, 805-893-3273,
805-893-3262 fax
2
Motivation for InP HBTs
Parameter InP/InGaAs Si/SiGe benefit
(simplified) collector electron velocity 3E7
cm/s 1E7 cm/s lower tc , higher Jbase electron
diffusivity 40 cm2/s 2-4 cm2/s lower tbbase
sheet resistivity 500 Ohm 5000 Ohm lower
Rbbcomparable breakdown fields Consequences, if
comparable scaling parasitic reduction 31
higher bandwidth at a given scaling
generation31 higher breakdown at a given
bandwidth Challenges for InP HBTs SiGe has much
better scaling parasitic reduction Present
efforts in InP HBT research community
Development of low-parasitic, highly-scaled,
high-yield fabrication processes Why mesa
DHBT?Simple way to continue the advance of
epitaxial material for improved speed
3
High speed HBTs some standard figures of merit
  • Small signal current gain cut-off frequency (from
    H21)
  • Power gain cut-off frequency (from U)

Collector capacitance charging time when
switching
4
Fast divider design considerations
5
Scaling Laws, Collector Current Density, Ccb
charging time
GaAsSb base
InGaAs base
Collector Depletion Layer Collapse
Collector Field Collapse (Kirk Effect)
Collector thickness150 nm
Collector capacitance charging time scales
linearly with collector thickness if J Jmax
6
Key Scaling Limit for digital logic ? Emitter
Resistance
ECL delay not well correlated with f? or fmax
Largest delay is charging Ccb
? Je ? 10 mA/?m2 needed for 200 GHz clock rate
Voltage drop of emitter resistance becomes
excessive RexIc ?exJe (15 ???m2) ? (10
mA/?m2) 150 mV ? considerable fraction of
?Vlogic ? 300 mV Degrades logic noise margin
? ?ex ? 7 ???m2 needed for 200 GHz clock rate
7
Digital circuits towards 200 GHz clock rate
142 GHz latch from NNIN _at_ UCSB 150 GHz ICs from
UCSB/GSC/RSC 200 GHz is the next goal
underlying technology400-500 GHz InP transistors
1.3 ?m base-collector mesa
8
DC, RF performance150 nm collector, 30 nm base
Average ? ? 36, BVCEO 5.1 V, BVCBO 5.8 V (Ic
50 ?A) Emitter contact (from RF extraction),
Rcont 10.1 ???m2 Base (from TLM) Rsheet
564 ?/sq, Rcont 9.6 ???m2 Collector (from TLM)
Rsheet 11.9 ?/sq, Rcont 5.4 ???m2
Griffith et al., IEEE Electron Device Letters,
Vol. 26, Jan 2005
9
DC, RF performance100 nm collector, 30 nm base
Average ? ? 40, BVCEO 3.1 V, BVCBO 3.6 V (Ic
50 ?A) Emitter contact (from RF extraction),
Rcont ? 7.8 ???m2 Base (from TLM) Rsheet 629
?/sq, Rcont 6.2 ???m2 Collector (from TLM)
Rsheet 12.9 ?/sq, Rcont 4.0 ???m2
Griffith et al., IPRM, Glasgow, Scotland, May 2005
10
Layer structure -- 120 nm collector, 30 nm base
DHBT
Vbe 0.9 V, Vcb 0.0 V
  • Objective
  • Determine collector thickness for improved
    balance of f? , fmax
  • Simultaneously gt 450 GHz
  • Decrease collector doping for increased
    collector depletion underneath base contact
  • reduce extrinsic Ccb
  • Thin InGaAs sub-collector contact layer from
    8.5 nm ? 6.5 nm for reduced ?JA

11
DC characteristicsCommon emitter and Gummel
Summary of device parameters Average ? ? 40,
BVCEO 3.9 V, BVCBO 4.1 V (Ic 50 ?A) Emitter
contact (from RF extraction), ?cont 8.4
???m2 Base (from TLM) Rsheet 610 ?/sq,
?cont 4.6 ???m2 Collector (from TLM) Rsheet
12.1 ?/sq, ?cont 8.4 ???m2
12
Experimental Measurement of Temperature Rise
Temperature rise calculated by measuring IC ,
?VCB and ?VBE
thermal feedback coefficient ? 8.35?10-4 V/K
at Je 5.8 mA/?m2
?JA 2.6561 1.0878?Vcb
13
Microwave gainspeak f? and fmax
14
Small signal model150 nm vs 120 nm collector
Ic 22.5 mA Vcb 0.6 V Aje 2.58 ?m2 f? 450
GHz fmax 490 GHz
Ic 13.2 mA Vcb 0.6 V Aje 2.58 ?m2 f? 391
GHz fmax 505 GHz
?ex ? 8.4 ???m2 ?c,base ? 4.6 ???m2
?ex ? 10.1 ???m2 ?c,base ? 9.6 ???m2
Device junction dimensions 0.6 ?m emitter, 4.3
?m length, 1.2 ?m base mesa width
15
Ccb variance of HBTs within CML static divider
circuit
CML switching endpoints labeled
16
Summary of published HBT performance
Collector thickness cited
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