Physics

1
Physics AstronomyHEP Electronics
TIM Interfaces to ROD Crate Components
ATLAS SCT TIM FDR/PRR 28 June 2004
Matthew Warren John Lane, Martin Postranecky
2
Overview

• TIM located in center of ROD crate (slot 13) for
  optimal signal paths.
• Sends Clock and Control signals over a custom J3
  backplane.
• Receives TTC Signals into front-panel via optical
  fibre.

ROD Crate
TIM!
RCC
ROD/ BOC 1-8
ROD/ BOC 9-16
3
TIM Connections Overview
ROD (Read-Out Driver)
ROD (Read-Out Driver)
RCC ROD Crate Controller
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD
VME
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD
ROD (Read-Out Driver)
ROD Read-Out Driver
TIM-OK
BOC
BOC
BOC
BOC
TIM TTC Interface Module
BOC
Signals Busses
FP/PO Resets
BOC
BOC
TTC (optical)
BOC
BOC
BOC
BOC
BOC
Front-End Modules Clock Control (optical)
BOC
BOC
BOC
BOC Back Of Crate
ROD Crate Busy
ROD Busys
NIM/ ECL Signals
(48/BOC)
Clocks Fanout
MRMW v1.0 17-06-04
4
ROD-Crate-Controller Interface
RCC ROD Crate Controller

• Standard VME Slave
• A24/A32
• D16
• D32 (top word unused)
• Preset or Geographical base-address

TIM TTC Interface Module
5
Back-Of-Crate Interface

• TIM distributes the BC clock to the BOC
• BOC feeds clock to ROD in same slot
• To minimise Skew/Jitter
• point-to-point same length lines
• differential signalling (PECL)

BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC
BOC Back Of Crate
TIM
6
Read-Out Driver Interface

• TIM distributes 8 Control Signals to RODs
• As TIM is in the middle of crate, there are 2
  busses - left and right - terminated at ends.
• TIM is can adjust phase of the signals to satisfy
  RODs setup and hold times.
• Signal assignment is flexible
• can be re-mapped in firmware

ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD
ROD (Read-Out Driver)
ROD
FP/PO Resets
TIM

• Signals active for one clock period.
• TIM introduces dead-time after its stand-alone
  signals to compensate for longer FE signals from
  the ROD.

7
Control Signals Description

• L1A Level-1 Trigger Accept
• ECR Reset Event Counter (L1ID)
• First L1A after ECR is zero
• BCR Reset Bunch Counter (BCID)- once per LHC
  orbit
• BCID value is in the range 0 3563 with LHC
  orbit BCRs.
• If no BCR occurs, BCID is 0 4095.
• CAL Calibration pulse command for front-end
  amplifiers
• SID Serialised Trigger ID - 24 L1ID 12 BCID
  bits
• STT Serialised Trigger Type - 8 TType 2
  reserved bits
• ID's have a single start bit, no stop bit
• SID, STT values are independently queued before
  TX
• FER Reserved - could be a separate periodic
  reset signal
• SPR Spare

8
ROD Busy/TIM-OK

• ROD-Busy
• Received by TIM from RODs.
• point-to-point signal.
• Active low, pulled high on TIM
• So empty slots are not indicated busy.
• TIM-OK
• Bussed to all slots in crate.
• Pulled down.
• Asserted when selected TIM clock is good.

ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD (Read-Out Driver)
ROD
ROD (Read-Out Driver)
ROD Read-Out Driver
TIM
FP/PO Resets