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Visual Basic for Applications

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Low Voltage Differential Signal (LVDS) Channel Links. E. E. D ... General purpose it should work with AFE, Mixer, and DFE boards! E. E. D. Hardware Interface ... – PowerPoint PPT presentation

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Title: Visual Basic for Applications


1
Visual Basic for Applications
  • The Datapump Board
  • Jamieson Olsen

2
Background I
  • D0 Central Track Trigger (CTT)

3
Background II
  • Trigger Electronics

Low Voltage Differential Signal (LVDS) Channel
Links
4
Background III
  • LVDS Channel Links

The PROBLEM Cant probe the LVDS pairs! Cant
use a logic analyzer or scope!
5
The Datapump
  • To debug our trigger hardware it would be useful
    to have a data pattern generator that would drive
    channel links.
  • Likewise, it would be good to have a board that
    could capture channel link data and read it out.
  • General purpose it should work with AFE, Mixer,
    and DFE boards!

6
Hardware Interface
  • Need some easy way to
  • load test vectors into the
  • transmitters and readout
  • the captured data on the
  • receivers.
  • Whats the hardware interface?

7
Hardware Interface
  • OK, use a PC!
  • How should the PC connect to the Datapump?
  • VME is not portable
  • PCI, PCMCIA, USB, IEEE1394? Huh?
  • Parallel port is fast easy to program!
  • (More on this later)

8
Datapump Board
9
Datapump Board
  • Three medium-sized Field Programmable Gate Arrays
    (FPGAs) are used to build the transmitter and
    receiver circuits.
  • A small CPLD acts as the parallel port interface
    bridge to the FPGAs.

10
Transmitter Circuit
  • Each transmitter sends 128 28-bit words (loops
    continuously).
  • All ten transmitters are synchronized to the same
    counter and 53MHz clock.
  • The transmitter test vectors can be read back for
    verification.

11
Receiver Circuit
  • Specify a unique trigger pattern for each
    receiver. Should include X (dont care) bits.
  • All receivers are armed simultaneously.
  • Once armed, each receiver waits for the trigger
    pattern, then captures 256 data words.

12
Parallel Port
  • Enhanced Parallel Port (EPP) is used
  • 8-bit bi-directional datapath
  • Three ports in the PC I/O space Control, Data,
    Address
  • Setup the control port, then
  • To write a byte outp(port, data)
  • To read a byte inp(port)

13
Parallel Ports and VBA
  • VBA does not include the inp() and outp()
    functions.
  • VBA calls functions in a DLL (ntio.dll) called
    VB_pokeIO(port, data) and VB_peekIO(port)
  • The peek/poke functions in this DLL cut through
    windows and get right to the hardware ports.

14
User Interface
  • There are lots of test vectors which need to be
    visible simultaneously.
  • An Excel spreadsheet is ideal for this
    application!
  • VBA talks to the datapump via the parallel port.

15
Excel Control Buttons
  • Configure the datapump FPGAs.
  • Write/Verify the transmitter test vectors.
  • Specify the trigger pattern for each receiver.
  • Arm and readback the receiver data.

16
Configuration
  • Must do this each time datapump is power cycled.
  • Originally this was a C program and DOS batch
    file, but it was all converted into VBA.
  • Writes three files to the datapump PLDs.
  • The VBA module is called HEXDUMP, calls two subs
    Vbwrite_C() and hexdump().

17
Datapump Transmitters
VBA module datapump, subroutines
Download_Vector() and Verify_Vector()
18
Datapump Receivers
VBA module datapump, subroutines setup_U1() and
readback_U1()
19
  • Backup Slides

20
EPP Registers
21
DFE Motherboard
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