CS 501: Software Engineering Fall 2000

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CS 501 Software EngineeringFall 2000
Lecture 19 Performance of Computer Systems
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Administration
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Moore's Law
Original version The density of transistors in
an integrated circuit will double every year.
(Gordon Moore, Intel, 1965) Current
version Cost/performance of silicon chips
doubles every 18 months.
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Moore's Law and System Design
Design system 2000 Production use
2003 Withdrawn from production
2013 Processor speeds 1 1.9
28 Memory sizes 1 1.9 28 Disk
capacity 1 2.2 51 System
cost 1 0.4 0.01
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Moore's Law Rules of Thumb
Planning assumptions Every year
cost/performance of silicon chips improves 25
cost/performance of magnetic media improves
30 10 years 1001 20 years 10,0001
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Parkinson's Law
Original Work expands to fill the time
available. (C. Northcote Parkinson) Planning
assumptions (a) Demand will expand to use all
the hardware available. (b) Low prices will
create new demands. (c) Your software will be
used on equipment that you have not envisioned.
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False Assumptions
Unix file system will never exceed 2 Gbytes (232
bytes). AppleTalk networks will never have more
than 256 hosts (28 bits). GPS software will not
last 1024 weeks. Nobody at Dartmouth will ever
earn more than 10,000 per month. etc., etc.,
.....
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Moore's Law and the Long Term
What level?
Within your working life?
1965
When?
2000?
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Predicting System Performance
Mathematical models Simulation
Direct measurement All require detailed
understanding of the interaction between software
and systems.
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Queues
arrive
wait in line
service
depart
Single server queue
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Queues
service
arrive
wait in line
depart
Multi-server queue
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Mathematical Models
Queueing theory Good estimates of congestion can
be made for single-server queues with
arrivals that are independent, random events
(Poisson process) service times that follow
families of distributions (e.g., negative
exponential, gamma) Many of the results can be
extended to multi-server queues.
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Utilization Rule of Thumb
When the utilization of any system component
exceeds 30, be prepared for congestion.
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Behavior of Queues Utilization
mean delay
utilization
1
0
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Simulation
Model the system as set of states and
events advance simulated time determine
which events occurred update state and event
list repeat Discrete time simulation Time is
advanced in fixed steps (e.g., 1
millisecond) Next event simulation Time is
advanced to next event Events can be simulated by
random variables (e.g., arrival of next customer,
completion of disk latency)
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Timescale
Operations per second CPU instruction 400,00
0,000 Disk latency 60
read 25,000,000 bytes Network LAN
10,000,000 bytes dial-up modem 6,000
bytes
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Measurements on Operational Systems
Benchmarks Run system on standard problem
sets, sample inputs, or a simulated load on the
system. Instrumentation Clock specific
events.
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Serial and Parallel Processing
Single thread v. multi-thread e.g., Unix
fork Granularity of locks on data e.g., record
locking Network congestion e.g., back-off
algorithms
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Example Performance of Disk Array
Each transaction must wait for specific disk
platter wait for I/O channel signal to move
heads on disk platter wait for I/O
channel pause for disk rotation read data Close
agreement between results from queueing theory,
simulation, and direct measurement (within 15).
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The Software Process
Requirements Definition
System and Software design
Programming and Unit Testing
Integration and System Testing
Operation and Maintenance