Title: HYDRIL
1HYDRIL
- SUBSEA CONTROL MODULE
- FOR OIL WELL BLOW-OUT PREVENTER
- (BOPs)
- Team 3B
- Matt Hewitt Project Manager
- Devin Welch Configuration Manager
- Paul Jaramillo Correspondent
- Nhat Pham Financial Officer
2Project Requirements
- Design and build an electronics module to monitor
and control the operation of a single ram
blow-out preventer (BOP) located sub sea. - Test the module with a set of actual or simulated
control system equipment.
3Solenoid Control
- The electronics module must independently trigger
two solenoids when commanded.
4Continuous Monitoring
- Flow (in GPM) of Hydraulic Fluid
- Ram Position via LVDT
- These values must be transmitted to the computer
on the ship.
5Additional Features
- Self Test Circuitry
- Redundancy
- Networkability for single and double ram BOPs
- Functional at ambient 6700 psi
6Requirements met
- Built prototype control module
- Tested module with Hydril supplied solenoids
- Continuously sampled Flowmeter and LVDT data with
A/D chip
7Requirement work in progress
- Communication with topside computer
- Communication with other modules
- Incorporate Self Test Circuitry
- Incorporate Redundant Circuits
- Functionality at 6700 psi
8Devin WelchConfiguration Manager
9Functional Block Diagram
10Functional Block Diagram
Overview
Topside Computer Input
Sub sea Sensor Input
Sub sea Self-Test Output
Control Module
Topside Computer Receiver
11Functional Block Diagram
Inputs to Control Module
High Pressure Flow Meter 0? 175 GPM
Hydraulic Flow
Analog Data
LVDT Ram Position Measurement
Analog Data
Power and Control Lines Analog 52V Digital 5V
Topside Signals and Power
12Functional Block Diagram
Control Module
Flow meter
Data Output
Data Acquisition and Transmission
LVDT
Solenoid 1 Coil Output
Solenoid Coil Monitoring Self-Test
Solenoid 2 Coil Output
Control Lines
Solenoid 1
1 / 2
Control Logic Solenoid Activation
Solenoid Drivers 52V, 1/2A
Solenoid 2
ON/OFF
13Functional Block Diagram
Control Module Outputs
Solenoid 1 Control Line
Solenoid 1
Solenoid 1 Coil Output
Solenoid 2 Control Line
Solenoid 2
Solenoid 2 Coil Output
Data Transmission Lines
Computer Received Output Signals
14Control Module2nd Level Block Diagrams
15Data Acquisition
Digital Circuit Board
Data Out
Analog Signal 0-5V
A/D Converter
Flow meter
Control In
FPGA
Data Out
Analog Signal 0-10V
A/D Converter
LVDT
Control In
16Flowmeter A/D Converter
17LVDT A/D Converter
18Solenoid Coil Self-Test
DPDT Relay
Relay Coil Control
Solenoid Driver Power
52V
Data Out
FPGA
FPGA Signal
3.3V
Solenoid Coil
A/D
0
Control In
R
0
19FPGA Control Logic
20FPGA
Inputs/Outputs
Digital Flow meter Data
Flow meter A/D Control
Solenoid 1 Control Line
Digital LVDT Data
LVDT A/D Control
Spartan XC3S400
Digital Coil Data
Solenoid 2 Control Line
Coil A/D Control
Topside Computer Control Lines
21Solenoid Drivers
22Solenoid Activation
Analog Circuit Board
FPGA Control Line 1
Vcc Gnd
Solenoid Driver
Solenoid 1
Driver Control line
FPGA Control Line 2
Vcc Gnd
Solenoid Driver
Solenoid 2
Driver Control line
Vcc52V
23Solenoid Driver Schematic
24Paul JaramilloCorrespondent
25VHDL Structure
- Two Components
- State Machine
- 16-bit Shift Register
- Serial In Parallel Out (SIPO)
26State Machine Function Table
User Specified Voltage
27State Machine Transition
State Translation S00 Wait (Initial) S01 Close
BOP S10 Open BOP S11 Not Used
2816-bit Shift Register
29A 2 D Converter Timing
30Read/Convert Process
31A-2-D Data Latch
32Nhat PhamFinancial Officer
33Parts cost
34Labor cost
35Actual Budget
36Budget difference