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SOCVSP Presentation
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SOC-VSP Continuous Validation & Model Deployment. Emulation, FPGA ... Yes. Import Legacy, 3rd Party & New RTL. ARM RealView SoC Designer. Carbon. SOC-VSP ... – PowerPoint PPT presentation
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Title: SOCVSP Presentation
1
Booth 606
Carbon Design Systems
2
ESL Tools / Models Are Needed
- System Modeling Environment
- Fast System Simulator
- Processor Peripheral Models
- RTL Model Import Tools
- Transactor Library
- SW / HW Profiling Tools
- SW / HW Integrated Debugging
RealView SoC Designer
3
Continuous Design Validation
- Early in the Design Cycle
- Legacy RTL Import
- Profile Arch.
- Cycle Accuracy
- TLM
- Middle of Design Cycle
- New RTL Import
- Validate FW on HW Model
- 100 HW Debug Visibility
- After Signoff
- All SW Model
- HW Accuracy
Signoff
Architectural Modeling Analysis
HW FW Development
HW/FW Integration Test
Model Deployment
Abstract Models
Emulation, FPGA Protos
GAP
GAP
GAP
4
Building a Virtual System Prototype
Carbonized RealView Component
Carbon Model
Carbon RTL Compiler
Carbon IP Wizard
Verilog VHDL RTL Custom IP
Carbonized Model
Pin I/F
C / C Compiler
Transaction I/F
Carbon Transactors
RealView SoC Designer
ahb
GPIO
irq
bslave0
ahb
bmaster
AHB Bus
ahb
irq
Import RTL as a fast, cycle-accurate,
transaction-level model
Custom IP
5
Hardware Profiling
- Component Wizard
- Profile Tab
- Define Streams
- Select Nets
- Define Trigger
- Define Counters
- Profile
- Register Events
- Memory Events
- Port Events
6
Side-by-Side SW HW Debug
7
The First Complete ESL Solution
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