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Event-Clock%20%20Visibly%20Pushdown%20Automata

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words with equal number of a and b is not a VPL, e.g., abab, abba, baab, ... Visibly pushdown languages (VPL) Properties of VPA and TVPA (Timed VPA) ... – PowerPoint PPT presentation

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Title: Event-Clock%20%20Visibly%20Pushdown%20Automata


1
Event-Clock Visibly Pushdown Automata
  • Mizuhito Ogawa (JAIST)
  • with Nguyen Van Tang
  • SOFSEM 2009.1.27

2
Model checking as an inclusion problem
  • Paths generated by a model M is those that
    allowed by a specification S
  • L(M) ? L(S) ? L(M) n L(S)C f
  • Possible combinations
  • M , S Finite Automata
  • M Pushdown Automaton, S Finite Automaton
  • M , S Pushdown Automata
  • Possible extensions
  • Timed constraints ?
  • S beyond finite automata ?

3
Timed automata (Alur, et.al. 94)
press
next
Off
On
Menu
press
press
press
  • Press quickly twice, it will enter to menu.
  • Add time constraints e.g., quickly less-than
    1
  • It sleeps (Off) when left more-than 5.
  • Remark Time constraints contains integers only.

Accepts (press,2) (press, 2.5) (next,3)
(next,4.4) (press,8)
4
Decidable properties of Timed Automata
  • Boolean operations
  • Decidable Union, intersection, emptiness
  • Undecidable Complement, universality (2 clocks)
  • Inclusion L(M) ? L(S)
  • S has ?1 clock decidable (Ouaknine, et.al. 04)
  • S has gt1 clocks undecidable (Alur, et.al. 94)

5
Event-clock automata (Alur, et.al. 94)
  • Def. The event-clock for a?S is a pair of clocks
    xa, ya
  • xa event-recording ? record time since last a
  • ya event-predicting ? record time until next a

a
b
e.g.,
b
b
a
a
q0
q1
q2
q0
q1
q2
yblt1
xa1
L1 (a,t1)(b,t2)(b,tn) tnt11
L2(a,t1)(a,tn-1)(b,tn) tn t1lt1
  • e.g., Spec. like ack must come in 1 can be
    described.

6
Properties of ECA
  • Boolean operations
  • Decidable all boolean operations.
  • Determinizable (subset construction works)
  • Language class relation
  • ECA ? TA (An ECA can be encoded as a TA.)
  • The class of ECA is incomparable to the class of
    deterministic TA.

7
Encoding ECA to TA (Alur, et.al. 94)
  • Event-recording clocks CR xa a?S
  • Reset xa?CR when a is read.
  • Event-predicting clocks CP ya a?S
  • Let FP be the set of all event-predicting
    constraints.
  • The set Q of states enlarged to QFP.
  • Add fresh clocks z(yac) for each yac ?FP.

ya
c
0
yac made
a read
8
Interval alphabet (DSouza 03)
  • Def. Interval alphabet ? S IntvCS where
  • CS xa, ya a ?S clocks
  • Intv ri,ri, (ri,ri1), (rn,8) 0 ? r1 lt
    lt rn

All integers appearing in event-clock constraints
  • Notation. Let ?(ai,ti) be a vector of clock
    values at ti
  • uw((a1,t1)(an,tn)) (a1,I1)(an,In) with
    ?(ai,ti) ? Ii
  • tw((a1,I1)(an,In)) (a1,t1)(an,tn)
    ?(ai,ti) ? Ii
  • Lemma. If ?(ti) depends only on an input timed
    word
  • For v??, tw(v) ?f implies uw(tw(v)) v
  • For a timed word w, w?tw(uw(w))

9
Untimed Translation
Translate event-clock constraints to interval
alphabet
e.g., Intv 0,0, (0,5), 5,5, (5,10),
10,10, (10,8) C xa, ya
(a,(0,0,))
(a,((0,5),))
q0
q1
q1
a, xalt10
(a,(5,5,))
q0
(a,((5,10),))
q2
b, ya gt5
(b,(,(5,10)))
q0
q2
(b,(,10,10))
M
(b,(,(10,8)))
ut(M)
10
Timed Translations
Translate Interval alphabet to event-clock
constraints
a, (5ltxa?xalt10)?
(a,(5,10))
q0
q2
q0
q2
ec(ut(M))
ut(M)
Lemma. L(ec(ut(M))) L(M) for an ECA M.
11
Model checking as an inclusion problem (again)
  • Paths generated by a model M is those that
    allowed by a specification S
  • L(M) ? L(S) ? L(M) n L(S)C f
  • Possible combinations
  • M , S Finite Automata
  • M Pushdown Automaton, S Finite Automaton
  • M , S Pushdown Automata
  • Possible extensions
  • Timed constraints ? ? Event-clock constraints
  • S beyond finite automata ?

12
Visibly Pushdown Automata (Alur, et.al. 04)
X
q
Y
ac / X
ac?Sc (call)
Z
Classification is universal (visibility)
q
q
Y
Y
ai
Z
ai?Si (local)
Z
ar / Y
q
Z
ar?Sr (return)
  • Visibility implies height-deterministic and
    synchronous. (Only an input word decides the
    stack height.)
  • ? Product construction (intersection) works!

13
Visibly pushdown languages (VPL)
  • VPL examples
  • an bn (with a?Sc, b?Sr )
  • Dyck language (well-balanced parantheses)
  • (with left/right parantheses as in Sc / Sr )
  • e.g. ( .. .. (..) .. .. ) OK, ( ..
    .. .. .. .. ) no.
  • VPL is a proper subclass of DPDA
  • an b an is not a VPL.
  • words with equal number of a and b is not a VPL,
    e.g., abab, abba, baab,

14
Properties of VPA and TVPA (Timed VPA)
  • Boolean operations (of VPA)
  • Decidable all boolean operations
  • Determinizable
  • Boolean operations (of TVPA)
  • Decidable union, intersection, emptiness
  • Undecidable Complement, universality (1 clock)
  • Inclusion L(M) ? L(S)
  • M,S (untimed) VPA decidable
  • M TVPA, S TVPA undecidable (Emmi, et.al. 06)

15
Event-Clock Visibly Pushdown Automata
Def. ECVPA VPA event clock constraints
Th 1. The inclusion problem for ECVPAs is
decidable.
  • Proof (idea) L(M)?L(S) ? L(M)n L(ec(ut(S)c)) f
  • S ECVPA (untimed translation)
  • ut(S) VPA (complement)
  • ut(S)c VPA (timed translation)
  • ec(ut(S)c) ECVPA with L(S)c L(ec(ut(S)c))

16
Inclusion between TVPA and ECVPA
Th 2. For a TVPA M and an ECVPA S, the inclusion
problem L(M) ? L(S) is decidable.
  • Proof (idea) L(M) ? L(S) ? L(M) n L(S) f
  • S ECVPA (untimed translation)
  • ut(S) VPA (complement)
  • ut(S)c VPA (timed translation)
  • ec(ut(S)c) ECVPA (encoding EC-constraints)
  • S TVPA with L(S)c L(S)

17
Conclusion
  • We showed that L(M) ? L(S)
  • M, S ECVPA decidable
  • M TVPA, S ECVPA decidable
  • Compare L(M) ? L(S) when S has 1 clock
  • M, S TA decidable (Oukline,
    et.al.04)
  • M, S TVPA undecidable (Emmi, et.al. 06)
  • M, S Buchi TA undecidable (Abdulla, et.al.
    05)
  • Simple untimed / timed translations avoid complex
    subset construction argument of VPA.
  • Buchi extensions of ECVPA are straight forward.
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