Reconfigurable architectures and design methodology for FPGAbased selftestable embedded systems

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Reconfigurable architectures and design
methodology for FPGA-based self-testable embedded
systems

• Valeri Skliarov
• Electronics, Telecommunications and Informatics
  Department (DETIUA), University of Aveiro,
  Portugal
• E-mail skl_at_ua.pt, URL www.ieeta.pt/skl

Contribution to this presentation was provided by
Luis Almeida, Bernardo Cunha, Paulo Ferreira,
Raimund Ubar, Rui Aguiar, Iouliia Skliarova
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Outline

• Why this idea? What is distinctive?
• Background and experience of DETIUA
• Embedded systems, computing and control
• Reconfigurable architectures and reconfigurable
  systems
• Algorithmic support
• International cooperation and potential partners
  in EU and Russia
• Integrated vision of the problem and how to
  collaborate

Valeri Skliarov
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Why this idea?
Target Radical advances in design process and
functional capabilities through dynamic
reconfiguration, customization and adaptation of
systems at architectural and component level

• Emphasis
• Reconfiguration at the level of system and
  functional blocks
• Design methodology hardware software
  reconfigurable hardware. Target dynamic
  reconfiguration and adaptation of networked
  embedded systems
• Making the system self-testable and
  self-verifiable (reuse of reconfigurable logic
  for fast system level test access and
  programming)
• Using models, methods, tools and algorithms
  retargeted to the design of embedded systems,
  such as digital signal and image processing
  (http//www.ieeta.pt/pjf/), combinatorial
  optimization (www.ieeta.pt/iouliia), synthesis
  of control units (www.ieeta.pt/skl), etc.

Valeri Skliarov
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Why this idea? What is distinctive?
(SHRH) (RSARCSCHCASC) (STRI) OA
Dynamically reconfigurable system and components
Future trends
Reconfigurable protocol stacks and interfaces
Models, methods, tools and algorithms targeted to
RS
of SOC functionally reconfigurable
Secure wired and wireless interaction
Self-test and self verification
Valeri Skliarov
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Background and experience of DETIUA
CAMBADA RoboCup World Champion,
2008 http//www.ieeta.pt/atri/cambada/
ICARO EcoShell Marathon http//icaro.ua.pt/
http//www.ist-daidalos.org/
Dynamic QoS management
NGN
Industrial Surveillance http//www.ieeta.pt/lse/ft
t/
Valeri Skliarov
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Background and experience of DETIUA

• General
• DETIUA is one of the most well known departments
  in Portugal in the field of Electronics,
  Telecommunications and Informatics.
• DETIUA has very strong relationship to embedded
  and reconfigurable systems. Examples
• Participation in ArtistDesign Network of
  Excellence on Embedded Systems Design
  (http//www.artist-embedded.org/artist/-Strategic-
  Management-Board,938-.html)
• CAMBADA (Cooperative Autonomous Mobile roBots
  with Advanced Distributed Architecture) - RoboCup
  middle-size league soccer team becomes World
  Champion in 2008 (http//www.ieeta.pt/atri/cambada
  / )
• Significant results in the scope of models,
  methods and tools for the design of
  reconfigurable and embedded systems
  (http//www.ieeta.pt/pjf/aval/ieeta.pdf), etc.

Valeri Skliarov
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Embedded systems, computing and control
(Software Hardware Reconfigurable Hardware)
(Reconfigurable System Architecture
Reconfigurable Components Soft Core Hard Core
Application- Specific Core)
(Self-Test Remote Interaction)
Optimization Algorithms
(SHRH) (RSARCSCHCASC) (STRI) OA
Valeri Skliarov
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Reconfigurable architectures and reconfigurable
systems

• Methods, design and implementation of
  reconfigurable processing units for
  implementation of computationally extensive
  algorithms and embedded systems
• Models, design templates, and methods of
  synthesis of advanced circuits for digital
  control

FPGA-based prototyping board with wired and
wireless configuration

• Software / reconfigurable hardware co-design,
  co-simulation and prototyping
• Reconfigurable hardware accelerators for embedded
  systems.

http//www.ieeta.pt/skl/Research/Projects/RecentP
rojects.html
Valeri Skliarov
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Algorithmic support

• Digital signal and image processing targeted to
  embedded systems, computation and control
• Parallelization, multithreading and pipelining in
  reconfigurable hardware
• Synthesis of advanced control systems
• Hardware implementation of recursive algorithms
• Combinatorial search algorithms
• Hardware support of OS functions
• Line-speed frame processing for telecommunication
  systems, both wired and wireless

Valeri Skliarov
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International cooperation and potential partners

• ArtistDesign Network of Excellence on Embedded
  Systems Design (http//www.artist-embedded.org/art
  ist/-Strategic-Management-Board,938-.html)
• Participation in project proposal at ARTEMIS
  Brokerage Event (Düsseldorf, 2008) -
  http//www.artemisia-association.org/brokerage-eve
  nt Design Support and Tooling for Embedded
  Control Software for Mechatronic Machines
• The project idea has already been discussed with
  and supported by
• Tallinn University of Technology - Estonia
  (research group of Prof. Raimund Ubar working in
  the scope of test and diagnostics) EU
• Technical University Ilmenau Germany
  (Integrated HW/SW System Group -Dr. Hans-Dieter
  Wuttke) EU
• Tampere University of Technology - Finland
  (research group of Jaakko Astola working in the
  scope of digital signal processing) EU
• St. Petersburg State University of Information
  Technologies, Mechanics and Optics the former
  LITMO (department of Prof. Anatoly Shalyto
  working in the scope of software engineering) -
  Russia
• St. Petersburg Electro Technical University - the
  former LETI (research group of Prof. Alexander
  Mursaev working in the scope of reconfigurable
  systems) Russia.

Valeri Skliarov
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Integrated vision of the problem
Requirements timeliness, safety, availability,
low cost, reconfigurability, reusability,
adaptability, integration, short design lead time
Embedded system
Distinctive features dynamically reconfigurable
architecture for networked embedded systems,
adaptation and reuse providing variable
instruction sets customization of interfaces,
self-test and software/reconfigurable hardware
co-design
Strategy rational use of software, hardware and
reconfigurable hardware (FPGAs)
Application areas telecommunications, industrial
automation, automotive systems, control systems,
hardware acceleration of algorithms
Valeri Skliarov
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Integrated vision of the problem
Embedded systems architecture
Multicore rational use of soft cores, hard cores
and application-targeted processing and control
units for resourse critical applications
Reconfiguration at system level (ex. dynamic
configuration of networked embedded systems) and
at component level (ex. customization of
protocols)
Support for codesign software hardware
reconfigurable hardware
Coprocessing based on IP soft cores for
implementation of computationally extensive
algorithms (ex. SAT solver, digital signal and
image processing)
Valeri Skliarov
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Integrated vision of the problem
Models, Methods, Algorithms
Models memory-based design cores with
dynamically modifiable functionality, parallel
and hierarchical FSMs, reprogrammable FSMs,
discrete matrices, BDDs
Methods software optimization through
implementation of critical parts in
reconfigurable hardware, exploring virtual
circuits for self-test and self-verification
Parallelization Communication activities, using
of dynamically reconfigurable multicores
Algorithms at two levels providing the desired
embedded system functionality and enabling
optimization of system functionality
Valeri Skliarov
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Integrated vision of the problem
Applications and examples

• Examples
• Machine vision
• diagnostics, fault detection, tracking, object
  classification, pattern recognition,
• Robots and assembly lines
• flexible manufacturing, cooperative behavior,
• Surveillance and supervision systems
• intrusion detection, traffic control,
• Communication equipment
• reconfigurable access control units, transcoders
  .
• Vehicle control
• engine, safety and comfort control,

Applications Telecom, industrial automation,
automotive systems, hardware accelerators for
application-specific software
Valeri Skliarov
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How to collaborate

• What kind of expertise can our Department offer
  regarding cooperative work with partners from
  Russia
• Reconfigurable architectures for networked
  embedded systems Specification and synthesis of
  advanced control systems Reconfigurable
  processing units for real-time embedded systems
  Remotely controlled embedded systems
  Matrix-based algorithms for solving optimization
  problems Coding theory and signal processing,
  analysis and synthesis of high speed
  synchronization trees and telecommunication
  network elements
• Expertise which can be offered by our partners
  from EU
• Self-testing, embedded fault diagnosis and fault
  tolerance (Tallinn) Reuse of reconfigurable
  logic for fast system level test access and
  programming (Ilmenau, Tallinn) Signal processing
  methods and tools, reconfigurable DSPs (Tampere,
  Tallinn) Performance analysis and optimization
  of mobile and wireless communication networks
  (Ilmenau).

• What kind of expertise and collaboration we are
  looking for from partners from Russia
• Formal verification and development of software
  for real-time embedded systems
  Software/hardware/reconfigurable hardware
  co-design and co-simulation Collaboration in the
  areas indicated above.

Valeri Skliarov
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Thank you

• Contact details Valeri Skliarov
• University of Aveiro,
• Department of Electronics, Telecommunications and
  Informatics,
• 3810-193 Aveiro Portugal
• e-mail skl_at_ua.pt