Title: Spin Torque Transfer Technology
1Spin Torque Transfer Technology
S. James Allen UC Santa Barbara
- Science
- Technology
- Spin Torque Transfer RAM, STT-RAM
- Spin Torque Transfer Nano-oscillators
- Spin logic devices
2Spin Torque Transfer Technology
With input from
Mark Rodwell UC Santa Barbara Bob
Buhrman Cornell Stu Wolf U. Virginia H.
Ohno Tohoku University Nick Rizzo Free
Scale Yiming Huai Grandis Bill
Rippard NIST Steve Russek NIST Eli
Yablonovitch UC Berkeley Ajey Jacob Intel
3Spin Torque Transfer Technology
From R. A. Buhrman, Spin Torque Effects in
Magnetic Nanostructures, Spintech IV, 2007
- Science
- Technology
- Spin Torque Transfer RAM, STT-RAM
- Spin Torque Transfer Nano-oscillators
- Spin logic devices
4Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
- Heisenberg exchange
- Giant magneto resistance
- Spin transfer torque
5Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Non-magnetic
Ef , 1-band
Ferromagnet
Ferromagnet
- Heisenberg exchange
- Giant magneto resistance
- Spin transfer torque
6Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Ef , 1-band
Ferromagnet
Ferromagnet
Ferromagnetic
Ferromagnetic
Anti-ferromagnetic
Anti-ferromagnetic
7Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Ef , 1-band
P 1, ideal, perfect spin valve
8 H. Ohno, Spintronics
Seminar, UCSB May, 2008
9 H. Ohno, Spintronics
Seminar, UCSB May, 2008
P 1, ideal, perfect spin valve
10 H. Ohno, Spintronics
Seminar, UCSB May, 2008
M. Hosomi, et al., A novel nonvolatile memory
with spin torque transfer magnetization
switching spin-ram, Electron Devices
Meeting,2005. IEDM Technical Digest. IEEE
International, pp. 459-462.
Free
Fixed SyF
P 1, ideal, perfect spin valve
11Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
q
Free
12Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Fixed
q
Free
13Spin Torque Transfer Science
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Fixed
q
Free
14Spin Torque Transfer Technology
From R. A. Buhrman, Spin Torque Effects in
Magnetic Nanostructures, Spintech IV, 2007
- Science
- Technology
- Spin Torque Transfer RAM, STT-RAM
- Spin Torque Transfer Nano-oscillators
- Spin logic devices
15GMR and STT --- STT-RAM
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Fixed
q
Free
16GMR and STT --- STT-RAM
T. Kawahara, R. Takemura, K. Miura, J. Hayakawa,
S. Ikeda, Y.M. Lee, R. Sasaki, Y. Gotot, K. Ito,
T. Meguro, F. Matskura, H. Takahash, H. Matsuoka
and H. Ohno, 2 Mb SPRAM (Spin-Transfer Torque
RAM) with bit-by-bit bi-directional current write
and parallelizing-direction current read, IEEE J
Solid-State Circuits, 43, 109 (2008).
200 mA
17Conventional MRAM (toggle) and Spin Torque MRAM
Spin polarized current produces torque to
reverse free layer.
H field produces torque to reverse free layer.
- Need Isw 40 mA/bit for 0.4 um x 1.0 um.
- Isw constant for smaller bits.
- Isw lt 1 mA/bit for 0.06 mm x 0.12 mm bit.
- Isw reduces as bit scales smaller.
18STT-RAM 2005
Free
Fixed SyF
M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho,
Y. Higo, K. Yamane, H. Yamada, M. Shoji, H.
Hachino, C. Fukumoto, H. Nagao, H. Kano, A novel
nonvolatile memory with spin torque transfer
magnetization switching spin-ram, Electron
Devices Meeting,2005. IEDM Technical Digest. IEEE
International, pp. 459-462.
19STT-RAM 2005
M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho,
Y. Higo, K. Yamane, H. Yamada, M. Shoji, H.
Hachino, C. Fukumoto, H. Nagao, H. Kano, A novel
nonvolatile memory with spin torque transfer
magnetization switching spin-ram, Electron
Devices Meeting,2005. IEDM Technical Digest. IEEE
International, pp. 459-462.
CMOS driver 100 mA/100 nm
S. Ikeda, J.Hayakawa, Y.M. Lee, F. Matsukura, Y.
Ohno, T. Hanyu and H. Ohno, Magnetic tunnel
junctions for spintronic memories and beyond,
IEEE Trans Elec. Dev. 54, 991 (2007).
20STT-RAM 2005
Read 0.2 V lt write!
M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho,
Y. Higo, K. Yamane, H. Yamada, M. Shoji, H.
Hachino, C. Fukumoto, H. Nagao, H. Kano, A novel
nonvolatile memory with spin torque transfer
magnetization switching spin-ram, Electron
Devices Meeting,2005. IEDM Technical Digest. IEEE
International, pp. 459-462.
CMOS sensing gt 0.2 V
S. Ikeda, J.Hayakawa, Y.M. Lee, F. Matsukura, Y.
Ohno, T. Hanyu and H. Ohno, Magnetic tunnel
junctions for spintronic memories and beyond,
IEEE Trans Elec. Dev. 54, 991 (2007).
21STT-RAM 2005
Sony
4 kb
M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho,
Y. Higo, K. Yamane, H. Yamada, M. Shoji, H.
Hachino, C. Fukumoto, H. Nagao, H. Kano, A novel
nonvolatile memory with spin torque transfer
magnetization switching spin-ram, Electron
Devices Meeting,2005. IEDM Technical Digest. IEEE
International, pp. 459-462.
S. Ikeda, J.Hayakawa, Y.M. Lee, F. Matsukura, Y.
Ohno, T. Hanyu and H. Ohno, Magnetic tunnel
junctions for spintronic memories and beyond,
IEEE Trans Elec. Dev. 54, 991 (2007).
22STT-RAM 2007
Grandis, Inc.
STT-RAM cell with integrated CMOS transistor. The
area of a single-level STT-RAM cell can be as
small as 6 F2.
Y. Huai, Z. Diao, Y.Ding, A. Panchula, S. Wang,
Z. Li, D. Apalkov, X. Luo, H. Nagai, A.
Driskill-Smith, and E. Chen, Spin Transfer
Torque RAM (STT-RAM) Technology, 2007 Inter.
Conf. Solid State Devices and Materials, Tsukuba,
2007, pp. 742-743.
S. Ikeda, J.Hayakawa, Y.M. Lee, F. Matsukura, Y.
Ohno, T. Hanyu and H. Ohno, Magnetic tunnel
junctions for spintronic memories and beyond,
IEEE Trans Elec. Dev. 54, 991 (2007).
Courtesy of Yiming Huai
23STT-RAM 2007
Hitachi
T. Kawahara, R. Takemura, K. Miura, J. Hayakawa,
S. Ikeda, Y.M. Lee, R. Sasaki, Y. Gotot, K. Ito,
T. Meguro, F. Matskura, H. Takahash, H. Matsuoka
and H. Ohno, 2 Mb SPRAM (Spin-Transfer Torque
RAM) with bit-by-bit bi-directional current write
and parallelizing-direction current read, IEEE J
Solid-State Circuits, 43, 109 (2008).
S. Ikeda, J.Hayakawa, Y.M. Lee, F. Matsukura, Y.
Ohno, T. Hanyu and H. Ohno, Magnetic tunnel
junctions for spintronic memories and beyond,
IEEE Trans Elec. Dev. 54, 991 (2007).
Courtesy of Hideo Ohno
24GMR and STT --- STT-RAM
T. Kawahara, R. Takemura, K. Miura, J. Hayakawa,
S. Ikeda, Y.M. Lee, R. Sasaki, Y. Gotot, K. Ito,
T. Meguro, F. Matskura, H. Takahash, H. Matsuoka
and H. Ohno, 2 Mb SPRAM (Spin-Transfer Torque
RAM) with bit-by-bit bi-directional current write
and parallelizing-direction current read, IEEE J
Solid-State Circuits, 43, 109 (2008).
25STT-RAM Projections vs State-of-the-art
A.Driskill-Smith, Y. Huai, STT-RAM A New Spin
on Universal Memory, Future Fab, 23, 28
Hitachi, 2007
Yes
1.6 x 1.6 mm TMR 100 x 50 nm2 (60)
40 ns
100 ns
gt 109
40 pJ/100ns
None
1.8 V
T. Kawahara, R. Takemura, K. Miura, J. Hayakawa,
S. Ikeda, Y.M. Lee, R. Sasaki, Y. Gotot, K. Ito,
T. Meguro, F. Matskura, H. Takahash, H. Matsuoka
and H. Ohno, 2 Mb SPRAM (Spin-Transfer Torque
RAM) with bit-by-bit bi-directional current write
and parallelizing-direction current read, IEEE J
Solid-State Circuits, 43, 109 (2008).
26STT-RAMProjections vs State-of-the-art
Nick Rizzo, Freescale
Toggle MRAM (180 nm) Toggle MRAM (90 nm) DRAM (90 nm) SRAM (90 nm) FLASH (90 nm) FLASH (32 nm) ST MRAM (90 nm) ST MRAM (32 nm)
cell size (mm2) 1.25 0.25 0.05 1.3 0.06 0.01 0.06 0.01
Read time 35 ns 10 ns 10 ns 1.1 ns 10 - 50 ns 10 - 50 ns 10 ns 1 ns
Program time 5 ns 5 ns 10 ns 1.1 ns 0.1-100 ms 0.1-100 ms 10 ns 1 ns
Program energy/bit 150 pJ 120 pJ 5 pJ Needs refresh 5 pJ 30 120 nJ 10 nJ 0.4 pJ 0.04 pJ
Endurance gt 1015 gt 1015 gt 1015 gt 1015 gt 1015 read, gt 106 write gt 1015 read, gt 106 write gt 1015 gt1015
Non-volatility YES YES NO NO YES YES YES YES
Hitachi, 2007
1.6 x 1.6 mm TMR 100 x 50 nm2 (60)
40 ns
100 ns
40 pJ
gt 109
Yes
T. Kawahara, R. Takemura, K. Miura, J. Hayakawa,
S. Ikeda, Y.M. Lee, R. Sasaki, Y. Gotot, K. Ito,
T. Meguro, F. Matskura, H. Takahash, H. Matsuoka
and H. Ohno, 2 Mb SPRAM (Spin-Transfer Torque
RAM) with bit-by-bit bi-directional current write
and parallelizing-direction current read, IEEE J
Solid-State Circuits, 43, 109 (2008).
90nm, 32nm MRAM values are projected These
values are from the ITRS roadmap
27Information Requested (2/2)
STT - RAM
- Current state-of-the-art using the provided
metrics as a guide (Appendix 2 of request for
white papers) - CMOS integrated STT-RAM demonstrated. 2Mb
- Key scientific and technological issues remaining
to accept the technology for manufacture. - Lower critical currents and larger TMR ratio.
Quality of the tunnel junction is critical. - Technology roadmap outlining a 5-15 year develop
path leading to manufacture in 5-10 years. - Replace MRAM. Embedded memory in logic
applications. Longer term universal memory.
28Spin Transfer Torque Nano-oscillator
J. C. Slonczewski, Conductance and exchange
coupling of two ferromagnets separated by a
tunneling barrier, Phys. Rev. B, 39 6995 (1989).
Fixed
q
Free
29Spin Transfer Torque Nano-oscillator
S. I. Kiselev, J. C. Sankey, I. N. Krivorotov, N.
C. Emley, R. J. Schoelkopf, R. A. Buhrman and D.
C. Ralph, Microwave oscillations of a nanomagnet
driven by a spin-polarized current, Nature,
425,380 (2003).
30 nmPt 2 nm Cu/ 3 nm Co/ 10 nm Cu/ 40 nmCo/ 80
nm Cu/
30Spin Transfer Torque Nano-oscillator
S. I. Kiselev, J. C. Sankey, I. N. Krivorotov, N.
C. Emley, R. J. Schoelkopf, R. A. Buhrman and D.
C. Ralph, Microwave oscillations of a nanomagnet
driven by a spin-polarized current, Nature,
425,380 (2003).
30 nmPt 2 nm Cu/ 3 nm Co/ 10 nm Cu/ 40 nmCo/ 80
nm Cu/
Key element A skew magnetic field !
31Spin Transfer Torque Nano-oscillator
30 nmPt 2 nm Cu/ 3 nm Co/ 10 nm Cu/ 40 nmCo/ 80
nm Cu/
0.2 nW estimated max.
32Spin Transfer Torque Nano-oscillatorInjection
Locking
W. H. Rippard, M. R. Pufall, S. Kaka, T. J.
Silva, S. E. Russek, J. A. Katine, Injection
Locking and Phase Control of Spin Transfer
Nano-oscillators, Phys. Rev. Lett., 95, 067203
(2005).
1 nm Au 1 nm Cu/ 5 nm NiFe/ 4 nm Cu/ 20 nm
CoFe/ 50 nmCu/ 5 nm Ta/
30 pW
33Spin Transfer Torque Nano-oscillatorFrequency
Modulation
M. R. Pufall, W. H. Rippard, S. Kaka, T. J.
Silva, and S. E. Russek Frequency modulation of
spin-transfer oscillators Appl. Phys. Lett. 86,
082506 (2005).
250 pW
34Spin Transfer Torque Nano-oscillatorPhase
Locking
S. Kaka, M.R. Pufall, W.H. Rippard, T.J. Silva,
S.E. Russek and J.A. Katine, Mutual
phase-locking of microwave spin torque
nano-oscillators Nature, 437, 389 (2005).
2 pW
35Spin Transfer Torque Nano-oscillatorB0.0
T. Devoldera, A. Meftah, K. Ito, J. A. Katine, P.
Crozat and C. Chappert, Spin transfer
oscillators emitting microwave in zero applied
magnetic field, J. Appl. Phys. 101, 063916 2007.
lt 1.0 pW
Fixed layer
36Spin Transfer Torque Nano-oscillatorPower
issues?
Some measures Cell phone 900 MHz, 1.8GHz,
500 mW Wireless access points 2.4 GHz, 5.0
GHz, 25 mW Automotive radar 24 GHz, 100 GHz
10 mW
State of the art STT nano-oscillators External
magnetic field, nW, efficiency 10-6
37Spin Transfer Torque Nano-oscillator
30 nmPt 2 nm Cu/ 3 nm Co/ 10 nm Cu/ 40 nmCo/ 80
nm Cu/
MgO tunnel barrier
1 mW estimated
38Spin Transfer Torque Nano-oscillatorPower
issues?
Some measures Cell phone 900 MHz, 1.8GHz,
500 mW Wireless access points 2.4 GHz, 5.0
GHz, 25 mW Automotive radar 24 GHz, 100 GHz
10 mW
State of the art STT nano-oscillators External
magnetic field, nW, efficiency 10-6
Projection MTJ based STT nano-oscillators mW,
efficiency 10-2 ? Power combining ? But
touch base with the Cornell, NIST, UVa
collaboration
39Information Requested (2/2)
STT Nano-oscillators
- Current state-of-the-art using the provided
metrics as a guide (Appendix 2 of request for
white papers) - Nano-oscillators at the nano-picowatt level with
spin valve structures, in external magnetic
fields. Existence proof of approach to external
magnetic field free sustained oscillation.
Phase locking, frequency modulation, injection
locking demonstrated. - Key scientific and technological issues remaining
to accept the technology for manufacture. - Increased power. Use of magnetic tunnel
junctions. Power combining. - Technology roadmap outlining a 5-15 year develop
path leading to manufacture in 5-10 years. - Needs to be guided by potential applications.
40MRAM --- Spin Logic Device
Mark Rodwell, UC Santa Barbara
Eli Yablonovitch, UC Berkeley
transpinnor
I
source
Ikeda et. al., Japanese Journal of Applied
Physics, Vol. 44, No 48, pp. L1442-L1445
drain
41Two views - Spin Logic
Output Power 1.610-8 W Total Power 2.510-8
W Efficiency65
Eli Yablonovitch
Mark Rodwell
Iinput
Iss
Ioutput
Inverter
Complementary Transpinnor logic
- Three state circuits
- memory and logic
- clocked logic
- 0 static dissipation
- Problems On/Off ratio is only about 51 Still
takes too many ?Amps to switch
42MRAM --- Spin Logic Device
Mark Rodwell, UC Santa Barbara
Eli Yablonovitch, UC Berkeley
transpinnor
I
source
Ikeda et. al., Japanese Journal of Applied
Physics, Vol. 44, No 48, pp. L1442-L1445
drain
43GMR and STT --- Spin Logic Device?
Can we control GMR by Magnetostatically
coupling to a STT switch ??
Mark Rodwell, UC Santa Barbara
Eli Yablonovitch, UC Berkeley
transpinnor
I
source
drain
44GMR and STT --- Spin Logic Device?
Can we control GMR by Magnetostatically
coupling to a STT switch ??
O. Ozatay,a_ N. C. Emley, P. M. Braganca, A. G.
F. Garcia, G. D. Fuchs, I. N. Krivorotov,R. A.
Buhrman, and D. C. Ralph, Spin transfer by
nonuniform current injection into a nanomagnet,
Appl. Phys. Lett., 88, 202502 (2006).
45GMR and STT --- Spin Logic Device?
Input
Current driven Clocked logic Inherent memory,
ISS ? 0, no change in input of next stage
Output
ISS
ISS
M. Rodwell Inverter
Input
Output
46GMR and STT --- Spin Logic Device?
M. Rodwell NAND Current controlled Clocked
logic 3-state, nonvolatile Cell 100F2 Energy
per bit 4 STT-RAM Switching speed
slower than STT-RAM
47Information Requested (2/2)
GMR-STT Spin logic devices
- Current state-of-the-art using the provided
metrics as a guide (Appendix 2 of request for
white papers) - Straw man concepts, synergistic with STT-RAM
developments - Key scientific and technological issues remaining
to accept the technology for manufacture. - Demonstration of magneto-static proximity
coupling of GMR device and STT switch - Technology roadmap outlining a 5-15 year develop
path leading to manufacture in 5-10 years. - Premature
48Spin Torque Transfer Technology
A perspective STT-RAM will be developed for
memory embedded in logic
applications. STT Nano-oscillators development
needs to guided by
potential application. Research on
potential STT Logic will be
leveraged by developments in STT-RAM