Interfacing TTL with CMOS A guide for engineering projects

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Interfacing TTL with CMOSA guide for engineering
projects

• Thomas G. CleaverUniversity of
  LouisvilleDepartment of Electrical and Computer
  EngineeringOct. 21, 2006

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References

• This presentation was developed using the
  following sources
• Texas Instruments, The TTL Data Book, Volume 2,
  Texas Instruments, 1985.
• Interfacing to MM74HC High Speed CMOS Logic
  web page, available at http//www.fairchildsemi
  .com/an/AN/AN-314.pdf, April 1998.

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Definition of Terms 1

• TTL Transistor-transistor logic. For example
  7404, a TTL inverter chip.
• LSTTL Low-power Schottky transistor-transistor
  logic. For example 74LS04, an LSTTL inverter
  chip.
• CMOS Complimentary metal-oxide semiconductor
• HC High speed CMOS logic. For example 74HC04,
  an HCMOS inverter chip.

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Definition of Terms 2

• iIH The current that flows into the input of a
  logic gate at the high (logic 1) level.
• iIL The current that flows into the input of a
  logic gate at the low (logic 0) level.
• iOH The current that flows into the output of a
  logic gate at the high (logic 1) level.
• iOL The current that flows into the output of a
  logic gate at the low (logic 0) level.

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Definition of Terms 3

• vIH The voltage at the input of a logic gate at
  the high (logic 1) level.
• vIL The voltage at the input of a logic gate at
  the low (logic 0) level.
• vOH The voltage at the output of a logic gate
  at the high (logic 1) level.
• vOL The voltage at the output of a logic gate
  at the low (logic 0) level.

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Logic Family Comparisons 1
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Logic Family Comparisons 2
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TTL to CMOS

• When connecting TTL or LSTTL to HCMOS, it is
  necessary to raise the logic one output voltage.
• This can be done with a pull-up resistor.
• Typical values 1 k? to 10 k?
• Use higher values if only HCMOS loads are
  attached.
• Use lower values if mixed LSTTL and HCMOS loads
  are attached.
• The problem can be avoided by using HCT family
  chips instead of HC.
• This may not work if the chips operate at
  different supply voltages.

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CMOS to TTL

• This is not usually a problem. CMOS outputs can
  directly drive TTL and LSTTL inputs, so long as
  fanout limits are observed.
• Fanout limits are 2 gates for TTL and 10 gates
  for LSTTL.

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Supply Voltage Level Changes

• Sometimes 74HC chips are powered at 3 V instead
  of 5 V.
• TTL and LSTTL outputs can usually drive such
  circuits directly without the need for pull-up
  resistors.
• When this wont work, a down-converting buffer
  (such as 74HC4049 or 74HC4050) can be used for
  level translation.