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The possibilities are endless.

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... (MuGFET, Ge/III-V), lithography (double pitch, EUV), and interconnect (nanoporous, air-gap) technologies being considered for these sub 32 nm technologies. – PowerPoint PPT presentation

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Title: The possibilities are endless.


1
  • The possibilities are endless.
  • Intel Tech Talk
  • Date Friday, October 30th
  • Time 1130am 100pm
  • Location 1110 Kim Building Lecture Hall
  • There will be food and soda provided! Feel free
    to bring a friend...
  • In 1965, Intel co-founder Gordon Moore declared
    that the number of transistors on a chip would
    double roughly every two years. Four decades
    later, the silicon microelectronics industry has
    turned this prediction into a maxim that has
    helped bring the world products that have changed
    the way we live, work and play.
  • Please join us to hear Dr. Sean King, Senior
    Technical Contributor and Process Development
    Engineer in Intels Portland Technology
    Development Division. Dr. King received a B.S. in
    Materials Engineering from Virginia Tech (1991)
    and a PhD in Materials Science Engineering from
    NCSU (1997). Since joining Intel in 1997, Dr.
    King has held a variety of technical positions in
    the development of 0.35 micrometer to 22
    nanometer technologies and he received Intels
    highest achievement award for the insertion of
    low-k dielectrics in the 90 nm technology.
  • Dr. King will provide an overview of RD
    methodology that has enabled Intel to maintain
    this aggressive technology scaling and enter the
    realm of silicon nano-electronics manufacturing.
    Intels implementation of high-k metal gate
    transistors and low-k dielectric copper
    interconnects will be used to illustrate
    technology development at 45 and 32 nm nodes.
    Discussing the realities and complications
    associated with further extending Moores law
    down to 22, 16, and 11 nm and highlighted by
    reviewing some of the new transistor (MuGFET,
    Ge/III-V), lithography (double pitch, EUV), and
    interconnect (nanoporous, air-gap) technologies
    being considered for these sub 32 nm
    technologies.
  • Please Bring Your Resume Intel is hiring
    students for internships and full-time employment
    with a background in Chemistry, Chemical
    Engineering, Computer Engineering, Computer
    Science, Electrical Engineering, Materials
    Science, Mathematics, Statistics, Mechanical
    Engineering, Biology and Physics at the
    Bachelors, Masters and PhD level.
  • Students should submit his/her during the Tech
    Talk. Also, please visit our Student Center
    website at www.intel.com/jobs/students.
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