Efficient Reachability Checking using Sequential SAT

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Efficient Reachability Checking using Sequential
SAT

• G. Parthasarathy, M. K. Iyer, K.-T.Cheng, Li. C.
  Wang
• Department of ECE
• University of California Santa Barbara

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Motivation

• Satisfiability in sequential circuits very
  important
• Applications to Reachability Analysis, model
  checking and ATPG
• Seen resurgence in SAT with recent advances
• C-SAT, BerkMin, Zchaff, Grasp, etc ..
• Similar performance benefits can be derived for
  search in a sequential space
• Sequential SAT has been proposed
• How does this perform versus current methods for
  reachability checking ?

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Outline

• Sequential SAT
• Search Strategies in Sequential SAT
• Efficient State Caching
• Reachability Checking with sequential SAT
• Experimental Results
• Comparison with BDDs
• Comparison with BMC
• Conclusions

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ATPG Formulation of Circuit Justification

• Typically X-Path based
• Decision points are subset of Primary inputs and
  internal signals eg. FANs headlines
• Nodes on justification frontier are justified
  one-by-one

J-frontier e Select J-node e Satisfy
J-node 1st x-pathc,a select a
0 Implications c0, d1, e0 J-node
satisfied Is J-frontier empty yes DONE
Solution a,b 0,X
J-frontier
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The Most Effective SAT Solvers

• Backtrack search
• Boolean constraint propagation
• Reasonable branching heuristic
• Clause recording
• Non-chronological backtracking
• Search strategies
• Restarts / Random backtracking
• Efficient data structures
• E.g. head/tail lists watched literals literal
  sifting
• Examples BerkMin Chaff SATO rel_sat GRASP

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Structural Search v/s Pure SAT
Feature SAT Structural Advantage
1 Conflict-based Learning Yes Minimal SAT
2 Eff. Implications Yes No SAT
3 Structural Information Min Yes Structural
4 Algorithm Complexity Low High SAT
5 Decision Ordering Heuristic Prob Struct/SAT (sat/unsat)
6 Size of SAT Assignments High Low Structural

• Iyer et. al. , SATORI A Fast sequential SAT
  solver for circuits, ICCAD 2003

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Sequential SAT SATORI

• Based on implicit time frame (TF) expansion
• For each TF, a combinational solver is used to
  find a solution
• includes heuristics to minimize the number of
  state variables with value assignment using
  3-valued logic
• Maximize size of these sets
• The state part of solution further justified in
  prior TF
• A conflict clause corresponding to the state
  part of the solution is added
• Prevents reaching the same state again in search
• Efficient state caching and retrieval
• Is complete
• Given enough time, will return a solution if one
  exists
• Otherwise will certify that no solution exists

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Sequential Search
1 Time Frame
Primary Inputs
Present State
Previous State
Register
Register
Primary Outputs
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3-Valued Search DFS or BFS
Obj1
frame0
Illegal State
Legal State
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State Cache internals

• State cubes are stored as state avoiding clauses
• State cube
• s0,s1,..,sn 1,0,X,X,..,1 is stored as
• (s0 s1 sn )
• Imply new state cubes on the state cache
• Conflicting cubes in the cache under the current
  assignments are covers
• Smallest covers will conflict first
• Eg Let new cube be s0,s1,..,sn
  1,0,1,X,..1,1
• We find implications of this assignment on state
  cache
• Old cube (s0 s1 sn) conflicts since it
  evaluates to FALSE

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SATORI Assignment Reduction
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Reachability Checking

• Set values of 0/1 on all lines in ISCAS89 ckts
• Check whether values are satisfiable from initial
  state
• Compare with state-of-art commercial ATPG engine
• No fault propagation
• Even comparison

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Effect of Path-Tracing
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Assignment Reduction State Cubes
State Cube Comparisons
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Reachability Checking
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Reachability Checking
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Safety property checking

• Sequential SAT in BFS mode does pre-image
  computation
• Check safety properties using pre-image
  computation
• Test-cases drawn from VIS distribution
• Sequential SAT uses a modified Buchi Automaton
• Automaton goes to a Trap state when a
  counter-example is found
• Automaton restricts search space to valid space
  for counter-examples
• Effectively guides the search for a
  counter-example.
• Compare with VIS 2.0 (BDD based)

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BDDs v/s SATORI Pre-Image Computation
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BDDs v/s SATORI with Image Computation
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Best Strategy Times BDDs v/s SATORI
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State space exploration
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True Properties VIS-BDDs v/s SATORI
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False Properties VIS-BDDs, BMC SATORI
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Performance on Selected false properties
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In Summary

• Sequential SAT is complete
• One can do efficient reachability checking using
  sequential SAT
• Competes with BDDs for property checking
• Comparative performance is good
• Efficiency can be improved through improved
  search order