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Pipelining

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Title: PowerPoint Presentation Author: Duckki Lee Last modified by: mchen Created Date: 1/1/1601 12:00:00 AM Document presentation format: On-screen Show (4:3) – PowerPoint PPT presentation

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Title: Pipelining


1
Pipelining
CDA 3101 Discussion Section 11
2
Question 1
  • Suppose that time for an ALU operation can be
    shortened by 25 in the following figure
  • a. Will it affect the speedup obtained from
    pipelining? If yes, by how much? If no, why?
  • b. What if the ALU operation now takes 25 more
    time?

3
Question 2
  • Identify all of the data dependencies in the
    following code.
  • add 3, 4, 2
  • sub 5, 3, 1
  • lw 6, 200(3)
  • add 7, 3, 6
  • a. Which dependencies are data hazards that will
    be resolved via forwarding?
  • b. Which dependencies are data hazards that will
    cause a stall?

4
Question 3
  • Consider executing the following code on the
    pipelined datapath of Figure 4.56
  • lw 4, 100(2)
  • sub 6, 4, 3
  • add 2, 3, 5
  • a. Draw a diagram that illustrates the
    dependencies that need to be resolved
  • b. Provide another diagram that illustrates how
    the code will actually be executed
  • c. How many cycles will it take to execute this
    code?

5
Question 3 Cont.
  • Figure 4.56

6
Question 4 (4.12.6)
  • The individual stages of the datapath latencies
    are as follows
  • Assume the instructions executed by the processor
    are broken down as follows
  • Instead of single-cycle organization, we can use
    a multi-cycle organization where each instruction
    takes multiple cycles but one instruction
    finishes before another is fetched. In this
    organization, an instruction only goes through
    stages it actually needs. Compare clock cycle
    times and execution times with single-cycle,
    multi-cycle, and pipelined organization.

IF ID EX MEM WB
a) 300ps 400ps 350ps 500ps 100ps
ALU beq lw sw
a) 50 25 15 10
7
Question 5 (4.13)
  • In this exercise, we examine how data dependences
    affect execution in the basic five-stage
    pipeline. Problems in this exercise refer to the
    following sequence of instructions
  • lw 1, 40(6)
  • add 6, 2, 2
  • sw 6, 50(1)
  • Assume there is no forwarding in this pipelined
    processor. Indicate hazards and add nop
    instructions to eliminate them.
  • Assume there is full forwarding. Indicate hazards
    and add nop instructions to eliminate them.

8
Question 5 cont.
  • Assume the following clock cycle times
  • c) What is the total execution time of this
    instruction sequence without forwarding and with
    full forwarding?
  • What is the speed-up achieved by adding full
    forwarding to a pipeline that had no forwarding?
  • d) Add nop instruction to this code to eliminate
    hazards if there is ALU-ALU forwarding only(no
    forwarding from the MEM to the EX stage)?
  • e) What is the total execution tie of this
    instruction sequence with only ALU-ALU
    forwarding? What is the speed-up over a
    no-forwarding pipeline?

Without forwarding With full forwarding With ALU-ALU forwarding only
a 300ps 400ps 360ps
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