Title: Formal Verification of Safety Properties in Timed Circuits
1Formal Verification ofSafety Properties inTimed
Circuits
- Marco A. Peña (Univ. Politècnica de
Catalunya) - Jordi Cortadella (Univ. Politècnica de
Catalunya) - Alex Kondratyev (Theseus Logic Inc.)
- Enric Pastor (Univ. Politècnica de
Catalunya)
2Are there any hazards or glitches?
3Outline
- Preliminaries
- Transitions systems and timing constraints
- From absolute to relative timing
- State space refinement by timing constraints
- Verification algorithm
- Results and conclusions
4Gate Delay Model
X
d??? 3,5
Z
d??? 2,4
Y
X
Y
5
4
2
3
Z
5A circuit is a concurrent system
Gates ? Processes Delays ? Computation
times Signal transitions ? Events
6Previous work
- Time separation of events
- McMillan Dill (1992) min/max constraints in
acyclic graphs - Hulgaard Burns (1994) max constraints for
cyclic graphs with choice - Zone automata
- Dill (1989) Clock zones represented as
conjunctions of timing constraints
(difference-bound matrices) - Rockiki, Myers, Belluomini (1994, 1998) Partial
orders to reduce the number of geometric regions
(ATACS) - Maler (1995) Timed polyhedra (Open KRONOS)
- Incremental refinement
- Alur et al. (1995) timing constraints added as
needed (COSPAN, timed automata). - Balarin Sangiovanni-Vincentelli (1995)
trace-based refinement - Negulescu (1997) process spaces (FIREMAPS)
7Our approach
- Time separation of events
- McMillan Dill (1992) min/max constraints in
acyclic graphs - Incremental refinement
for absolute timing analysis
by acyclic graphs with relative timing
8Our approach features
- Applicable to timed transition systems, with any
type of causality relations - Verification of temporal safety properties
- BDD-based symbolic representation(large untimed
state spaces can be handled) - Backannotation sufficient (relative) timing
constraints for correctness are reported
9Transition systemsand timing constraints
10x
a
b
- Transition System
- States
- Transitions
- Events
b
g
a
c
c
g
b
c
a
b
c
g
c
b
d
g
y
d
g
11x
Firing Region (a)
a
b
b
g
a
c
c
g
b
c
a
b
c
g
c
b
d
g
y
d
g
12x
Firing Region (b)
a
b
b
g
a
c
c
g
b
c
a
b
c
g
c
b
d
g
y
d
g
13x
a
b
Concurrency a b
b
g
a
c
c
g
b
c
a
b
c
g
c
b
d
g
y
d
g
14x
a
b
AND causality
b
g
a
c
c
a
b
c
g
b
c
a
b
c
g
FR (d)
d
c
b
d
g
y
d
g
15x
a
b
OR causality
FR (c)
b
g
a
c
c
a
b
g
b
c
a
b
c
g
c
c
b
d
g
y
d
g
16x
- Property
- g must fire before d after having fired x
a
b
b
g
a
c
c
g
b
c
a
b
c
g
c
b
d
g
y
d
g
17x
- Timed Transition System
- (Manna, Pnueli)
- Transition System
- Min/Max Delays
a
b
b
g
a
c
c
b
c
c
g
d(a) ? 1,2 d(b) ? 1,2 d(c) ? 2.5,3 d(g) ?
0.5,0.5 d(d,x,y) ? 0,?)
c
y
d
18From absolutetorelative timing
19x
a
b
b
g
a
c
c
g
b
c
a
b
c
g
c
b
d
g
y
d
g
20- An event e can only become enabled at the time
another event e fires (e triggers e)
21x
x
a
b
a
g
c
b
c
d
d
g
22Event structure from a trace
x
x
a
b
a
g
c
b
c
d
d
g
23x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
24x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
25x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
26x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
27x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
28x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
29x
x
a,b
a
b,c,g
b
c,g
c
d,g
d
g
g
Ø
30x
x
x
x
x
x
a,b
a,b
a,b
b
a
a
a
b,c,g
b,c,g
a
c
g
c,g
b,g
b,c
c
g
b
d,g
b
c
d
b
c
g
d
d
g
d
d
Ø
Ø
Ø
31Maximum Time Separation (McMillan Dill, 1992)
x
1,2
1,2
a
b
0.5,0.5
2.5,3
g
c
0,?)
0,?)
d
max t(g) - t(d)
-2
32Maximum Time Separation (McMillan Dill, 1992)
x
1,2
1,2
a
b
0.5,0.5
2.5,3
g
c
0,?)
0,?)
d
max t(g) - t(d)
-2
33Maximum Time Separation (McMillan Dill, 1992)
x
From absolute to relative timing
a
b
g
c
d
max t(g) - t(d)
-2
34x
x
x
x
x
x
x
x
a,b
a,b
a,b
a,b
a
b
a
a
b,c,g
a
b,c,g
b,c,g
b
a
c
g
c,g
c,g
b,g
b,c
c
c
g
b
d,g
d,g
b
c
d
d
b
c
g
g
d
d
g
g
d
d
Ø
Ø
Ø
Ø
35x
x
Theorem The trace is timing consistent iffit is
an enabling-compatible traceof the timed event
structure
x
x
a,b
a,b
a
a
b,c,g
b,c,g
b
c
c,g
b,g
c
g
d,g
b
d
b
g
d
- dmin and dmax for each event
g
d
Ø
Ø
36State space refinementbytiming constraints
37x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
38x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
39x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
40x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
41x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
42x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
43x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
Enabling compatible
d
g
44x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
45x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
Not enabling compatible
d
g
46x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
Not enabling compatible
d
g
47x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
48x
x
a
b
a
b
b
g
a
c
c
g
g
c
b
c
a
b
c
g
d
c
b
d
g
y
d
g
49x
a
b
b
g
a
c
c
g
b
c
c
a
b
c
g
g
c
c
b
d
d
g
g
y
y
d
d
g
g
50x
x
a
a
b
b
g
c
g
g
c
b
c
b
c
g
d
c
b
d
g
d
g
51x
x
a
a
b
b
g
c
g
g
c
b
c
b
c
g
d
c
b
d
g
d
g
52x
x
a
a
b
b
g
c
g
c
b
c
c
g
d
c
d
53x
a
b
b
g
a
c
b
c
a
g
g
c
c
d
g
y
y
d
d
g
54x
b
x
a
c
a
b
c
a
g
g
c
c
d
g
d
d
g
55x
b
x
a
c
a
b
c
a
g
g
c
c
d
g
d
d
g
56x
b
x
a
c
a
b
c
g
g
c
c
d
d
57x
a
b
b
g
a
b
g
g
c
c
y
y
d
d
58x
a
b
b
g
a
b
g
g
c
c
y
y
d
d
59Verificationalgorithm
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67Symbolic state space exploration and failure
detection
68Border of failure states
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74Backannotation (sufficient timing constraints)
75Convergence of the algorithm
76Implementation issues
- Event structure calculated from the shortest
suffix that invalidates the failure trace - Composition slight modification of the
Transition Relation (one extra boolean variable
to indicate enabling compatibility) - State encoding n bits for untimed states
nk bits for timed states(k
event structures used for timing analysis)
77Experimental results
78Experimental results
79Conclusions
- Timing analysis with absolute delays typically
produces unmanageable state spaces - Temporal properties (no glitches, mutual
exclusion, no conflicts) can be posed as relative
timing constraints - Strategy combine absolute timing (for
analysis)with relative timing (for state space
calculation) - Backannotation important in the design flow and
for sensitivity analysis
80Experimental results the STARI FIFO