Textbook: VLSI ARRAY PROCESSORS

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Textbook VLSI ARRAY PROCESSORS S.Y.
Kung Prentice-Hall, Inc. ????
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? INSTRUCTOR CHING-LONG SU
E-mail kevinsu_at_twins.ee.nctu.edu.tw
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Chapter 3
Chapter 3 Mapping Algorithms onto Array Structures
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Outline of Chapter 3
3.1 Introduction 3.2 Parallel Algorithm
Expressions 3.3 Canonical Mapping
Methodology 3.4 Generalized Mapping Methodology
from DG to SFG 3.5 Concluding Remarks 3.6 Problem
s
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3.1 Introduction
3.1 Introduction 3.2 Parallel Algorithm
Expressions 3.3 Canonical Mapping
Methodology 3.4 Generalized Mapping Methodology
from DG to SFG 3.5 Concluding Remarks 3.6 Problem
s
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3.1 Introduction

• 4 Questions of Mapping Algorithms onto Array
  Structures
• What are the main considerations in providing a
  formal and powerful description (expression) of
  the algorithms ?
• What are the proper guidelines for VLSI algorithm
  design and revision ?
• What is a systematic method to transform an
  algorithm description to an array processor ?
• How is optimization of parallel algorithm
  achieved ?

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3.2 Parallel Algorithm expressions
3.1 Introduction 3.2 Parallel Algorithm
Expressions 3.3 Canonical Mapping
Methodology 3.4 Generalized Mapping Methodology
from DG to SFG 3.6 Concluding Remarks 1.7 Problem
s
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3.2 Parallel Algorithm Expressions

• Parallel algorithm expressions may be derived by
  two approaches

1. Vectorization of sequential algorithm expressions
2. Direct parallel algorithm expressions, such as
   snapshots, recursive equations, parallel codes,
   single assignment code, dependence graphs, and so
   on.

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3.2.1 Vectorization of Sequential Algorithm
Expression

• Sequential Expression of Matrix Addition
  Algorithm CAB
• Assume C(i,j) A(i,j) B(i,j) for all i and j
• (A,B are 4?4 matrix)

DO 10 J1,4 DO 10 I1,4 C(I, J)A(I, J)B(I,
J) 10 CONTINUE
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3.2.1 Vectorization of Sequential Algorithm
Expression

• Matrix-vector Multiplication Algorithm
• A matrix b vector
• The ith element of c is

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3.2.1 Vectorization of Sequential Algorithm
Expression

• Sequential Expression of Matrix-vector
  Multiplication Algorithm

DO 10 I1,4 C(I)0 DO 10 J1,4 C(I)C(I)A(I,
J)B(J) 10 CONTINUE
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3.2.1 Vectorization of Sequential Algorithm
Expression

• Vectorizated Expression of Matrix-vector
  Multiplication Algorithm

IN PARALLEL FOR 1ltIlt4, 1ltJlt4 DO BEGIN TEMP
(I, J)A(I, J)B(J) END IN PARALLEL DO IN
PARALLEL FOR 1ltIlt4 DO BEGIN C(I)0 DO
10 J1,4 C(I)C(I)TEMP(I,J) 10
CONTINUE END IN PARALLEL DO
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3.2.2 Direct Expressions of Parallel Algorithms

• Single Assignment Code is a form where every
  variable is assigned one value only during the
  execution of the algorithm

Single Assignment Code
Non-Single Assignment Code
DO 10 I1,4 C(I)0 DO 10 J1,4 C(I)C(I)A(I,
J)B(J) 10 CONTINUE
DO 10 I1,4 C(I, 1)0 DO 10 J1,4 C(I,
J1)C(I, J)A(I, J)B(J) 10 CONTINUE
Double assign one value
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3.2.2.1 Recursive Algorithms

• Recursive Representation for Matrix-vector
  Multiplication Algorithm
• is
• where j is the recursion index, j1, 2,