Title: ECE434a Advanced Digital Systems L02
1ECE434aAdvanced Digital SystemsL02
- Electrical and Computer EngineeringUniversity of
Western Ontario
2Outline
- What we know
- Laws and Theorems of Boolean Algebra
- Simplification of Logic Expressions
- What we do not know
- How to use K-maps for 5, 6 variables
- How to design using only NAND or only NOR gates
- What are tri-state buffers for
- What are basic combinational building blocks
- Multiplexers
- Decoders
- Encoders
- How to implement functions using ROMs, PLAs, and
PALs
3Review Laws and Theorems of Boolean Algebra
4ReviewLaws and Theorems of Boolean Algebra
5Review Simplifying Logic Expressions
- Combining terms
- Use XYXYX, XXX
- Eliminating terms
- Use XXYX
- Eliminating literals
- Use XXYXY
- Adding redundant terms
- Add 0 XX
- Multiply with 1 (XX)
6Review Karnaugh Maps
Sum of products
Product of sums
7Five variable Karnaugh Map
- f(1) 2,3,6,7,9,13,18,19,22,23,24,25,29
BC
BC
00
01
10
11
00
01
11
10
DE
DE
1
00
00
01
01
11
11
10
10
A1
A0
8Six Variable Karnaugh Map
AB00
AB01
AB10
AB11
9Designing with NAND and NOR Gates (1)
- Implementation of NAND and NOR gates is easier
than that of AND and OR gates (e.g., CMOS)
10Designing with NAND and NOR Gates (2)
- Any logic function can be realized using only
NAND or NOR gates gt NAND/NOR is complete - NAND function is complete can be used to
generate any logical function - 1 a I (a a) a a 1
- 0 a I (a a) a I (a a) 1 1 0
- a a a a
- ab (a b) (a b) (a b) ab
- ab (a a) (b b) a b a b
11Conversion to NOR Gates
- Start with POS (Product Of Sums)
- circle 0s in K-maps
- Find network of OR and AND gates
12Conversion to NAND Gates
- Start with SOP (Sum of Products)
- circle 1s in K-maps
- Find network of OR and AND gates
13Tristate Logic and Busses
- Four kinds of tristate buffers
- B is a control input used to enable and disable
the output
14Data Transfer Using Tristate Bus
15Combinational-Circuit Building Blocks
- Multiplexers
- Decoders
- Encoders
- Code Converters
- Comparators
- Adders/Subtractors
- Multipliers
- Shifters
16Multiplexers 2-to-1 Multiplexer
- Have number of data inputs, one or more select
inputs, and one output - It passes the signal value on one of data inputs
to the output
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s
0
w
0
0
f
s
f
w
1
1
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1
(a) Graphical symbol
(c) Sum-of-products circuit
f
s
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0
0
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1
1
(b) Truth table
17Multiplexers 4-to-1 Multiplexer
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0
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f
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1
1
0
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00
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1
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01
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1
0
1
f
1
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10
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1
0
2
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11
3
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1
1
1
3
f
(b) Truth table
(a) Graphic symbol
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(c) Circuit
18Multiplexers Building Larger Mulitplexers
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1
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1
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f
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1
7
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f
0
2
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1
3
8
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11
(a) 4-to-1 using 2-to-1
(b) 16-to-1 using 4-to-1
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12
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15
19Synthesis of Logic Functions Using Muxes
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f
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1
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1
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1
f
1
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1
1
(a) Implementation using a 4-to-1 multiplexer
f
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1
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1
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(c) Circuit
(b) Modified truth table
20Synthesis of Logic Functions Using Muxes
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1
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f
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1
(a) Modified truth table
(b) Circuit
21Decoders n-to-2n Decoder
- Decode encoded information n inputs, 2n outputs
- If En 1, only one output is asserted at a time
- One-hot encoded output
- m-bit binary code where exactly one bit is set to
1
w
y
0
0
n
n
2
inputs
w
outputs
n
1
y
n
Enable
2
1
En
22Decoders 2-to-4 Decoder
y
w
w
y
y
y
En
0
1
0
1
2
3
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0
0
0
1
1
0
0
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y
0
0
1
1
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1
0
0
w
1
1
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1
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1
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1
1
0
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1
y
x
x
0
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0
1
(a) Truth table
y
2
w
y
0
0
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y
y
1
1
3
y
2
En
y
En
3
(c) Logic circuit
(b) Graphic symbol
23Decoders 3-to-8 Using 2-to-4
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y
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0
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1
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1
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2
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En
3
3
y
w
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En
4
0
0
y
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y
5
1
1
y
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2
6
y
y
En
7
3
24Decoders 4-to-16 Using 2-to-4
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y
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y
0
0
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0
y
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1
1
1
1
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2
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En
3
3
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y
0
0
4
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1
1
5
y
y
2
6
w
y
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y
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2
En
0
0
3
7
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y
w
1
1
3
y
2
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y
y
y
En
En
8
0
0
3
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1
1
9
y
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2
10
y
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En
3
11
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y
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1
1
13
y
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14
y
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En
3
15
25Encoders
- Opposite of decoders
- Encode given information into a more compact form
- Binary encoders
- 2n inputs into n-bit code
- Exactly one of the input signals should have a
value of 1,and outputs present the binary number
that identifies which input is equal to 1 - Use reduce the number of bits (transmitting and
storing information)
w
0
y
0
n
n
2
outputs
inputs
y
n
1
w
n
2
1
26Encoders 4-to-2 Encoder
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y
y
w
w
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3
1
0
2
1
0
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0
0
0
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0
0
1
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1
y
0
1
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0
1
0
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1
0
0
1
0
0
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2
1
1
1
0
0
0
y
1
w
3
(a) Truth table
(b) Circuit
27Encoders Priority Encoders
- Each input has a priority level associated with
it - The encoder outputs indicate the active
inputthat has the highest priority
(a) Truth table for a 4-to-2 priority encoder
w
w
y
y
w
w
z
0
1
0
1
2
3
d
d
0
0
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1
0
0
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1
1
1
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1
0
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1
0
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x
1
1
1
1
28Code Converters
- Convert from one type of input encoding to a
different output encoding - E. g., BCD-to-7-segment decoder
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a
b
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w
w
c
d
e
f
g
0
1
2
3
a
a
1
1
1
0
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0
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1
1
1
0
b
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1
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1
0
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b
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c
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1
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1
d
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1
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1
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1
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1
g
2
e
c
e
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0
1
1
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f
1
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1
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d
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1
(b) 7-segment display
1
1
1
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1
1
1
0
0
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0
(a) Code converter
0
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1
1
1
1
1
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1
1
1
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1
1
1
0
1
1
(c) Truth table
29Extension of Digital Design Fundamental
- What is the optimization?
- Synthesis
- Design project 1
- Optimization based on majority gate
- Modified K-map based on majority gate
- Optimization based on pass gate
- Modified K-map based on pass gate
30Programmable Logic Devices
- Read Only Memories (ROMs)
- Programmable Logic Arrays (PLAs)
- Programmable Array Logic Devices (PALs)
31Read-Only Memories
- Store binary data
- data can be read out whenever desired
- cannot be changed under normal operating
conditions - n input lines, m output lines gt array of 2n
m-bit words - Input lines serve as an address to select on of
2n words - Use ROM to implement logic functions?
- n variables, m functions
32Basic ROM Structure
33ROM Types
- Mask-programmable ROM
- Data is permanently stored (include or omit the
switching elements) - Economically feasible for a large quantity
- EPROM (Erasable Programmable ROM)
- Use special charge-storage mechanism to enable or
disable the switching elements in the memory
array - PROM programmer is used to provide appropriate
voltage pulses to store electronic charges - Data is permanent until erased using an
ultraviolet light - EEPROM Electrically Erasable PROM
- erasure is accomplished using electrical pulses
(can be reprogrammed typically 100 to 1000
times) - Flash memories - similar to EEPROM except they
use a different charge-storage mechanism - usually have built-in programming and erase
capability, so the data can be written to the
flash memory while it is in place, without the
need for a separate programmer
34Programmable Logic Arrays (PLAs)
- Perform the same function as a ROM
- n inputs and m outputs m functions of n
variables - AND array realizes product terms of the input
variables - OR array ORs together the product terms
35PLA 3 inputs, 5 p.t., 4 outputs
36nMOS NOR Gate
37AND-OR Array Equivalent
38To Do
- Textbook
- Chapter 1.3, 1.4, 1.13
- Read
- Alteras MAXplus II and the UP1 Educational
boardA Users Guide, B. E. Wells, S. M. Loo - Altera University Program Design Laboratory
Package - Design Project 1 majority gate and pass gate