Research: Past, Present and Future

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Research Past, Present and Future

• Philip Sweany
• 10/27/06

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Past

• Retargetable Compilers
• Register Assignment
• Instruction Scheduling

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Retargetable Compilation

• Rocket
• C compiler, written in C
• Retargetable for ILP computers
• Single machine description file
• Development 1989-2000
• Gnu
• Scale

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Instruction Scheduling

• Local (Basic Block)
• Global --- Dominator-Path Scheduling
• Software Pipelining
• Heuristic search
• Genetic algorithms
• Simulated Annealing
• Integer-Linear programming

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Register Assignment

• Early vs. Late
• CRAIG
• Clustering
• Our algorithm degrades 10 over ideal
• Next best degrades 19 over ideal

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Paritioned Register Banks
F1
F2
F3
F4
F5
F6
F7
F8
Register A
Register B
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Current --- Compilation

• Hybrid Architectures
• Multithreading
• Memory Optimization
• Scratch-pad memory
• Tradeoff cache, scratch-pad
• Architectural Support
• Function Reuse
• Split Cache

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Hybrid Computing

• Heterogeneous processors on single chip
• CPU
• FPGA
• ASIC
• N CPUs, M FPGAs, K ASICs
• Tradeoffs of performance, power, flexibility

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Generic Hybrid Computer
CPU 1
FPGA 1
FPGA 2
CPU 2
Shared Memory
CPU m
FPGA n
Multi-CPU
Multi-FPGA
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Hy-C
System Specification
Source Code
Partitioning
CPU Compiler
FPGA Compiler
CPU Power-Performance Model
FPGA Power-Performance Model
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Multithreading

• Identify threads from SSA
• SDF Scheduled Dataflow
• Multithreaded
• Decouple memory access, execution
• Clusters for scalability

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SDF Clusters
SP
SP

EP
EP
EP
EP
C0
Cn-1
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Future

• Automatic Code Generation (I dont believe in
  software)
• Visual Programming of Components