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Lecture 5 EGRE 254

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Lecture 5 EGRE 254 1/28/09 Boolean algebra a.k.a. switching algebra deals with Boolean values -- 0, 1 Positive-logic convention analog voltages LOW, HIGH -- 0 ... – PowerPoint PPT presentation

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Title: Lecture 5 EGRE 254


1
Lecture 5EGRE 254
  • 1/28/09

2
Boolean algebra
  • a.k.a. switching algebra
  • deals with Boolean values -- 0, 1
  • Positive-logic convention
  • analog voltages LOW, HIGH --gt 0, 1
  • Negative logic -- seldom used
  • Signal values denoted by variables(X, Y, FRED,
    etc.)

3
Boolean operators
  • Complement X or (opposite of X)
  • AND X Y
  • OR X Y

binary operators, describedfunctionally by truth
table.
4
More definitions
  • Literal a variable or its complement
  • X, X, FRED, CS_L
  • Expression literals combined by AND, OR,
    parentheses, complementation
  • XY
  • P Q R
  • A B C
  • ((FRED Z) CS_L A B C Q5) RESET
  • Equation Variable expression
  • P ((FRED Z) CS_L A B C Q5)
    RESET

5
Logic symbols
6
Basic Axioms
A1 A1
A2 A2
A3 A3
A4 A4
A5 A5
7
Proving theorems
  • Using axioms or theorems already proven.
  • Perfect induction Verify theorem for all
    possible values of the variables.
  • 1 variable 2 21 possible values. 0, 1
  • 2 variables 4 22 possible values. 00, 01, 10,
    11
  • 3 variables 8 23 possible values. 000, 001, ,
    111
  • n variables 2n possible values.
  • For general case of n variable we use the
    mathematical technique of finite induction.

8
Prove T1 and T1
  • T1 X 0 X
  • Proof 1a
  • If X 0 then X 0 X by A4
  • If X 1 then X 0 X by A5
  • Proof 2a,b
  • T1 X?1 X
  • Proof 1b
  • If X 1 then X?1 X by A4
  • If X 0 then X?1 X by A5
  • Proof 3b
  • T1 follows from duality of T1.

X X0 X?1
0 0 0
1 1 1
9
Basic Theorems
T1 T1
T2 T2
T3 Idempotent law T3
T4 T4 Same as T4
T5 T5
10
Theorems
T6 Commutative law T6
T7 Associative law T7
T8 Distributive law T8
T9 Adsorption law T9
T10 T10
T11 T11
11
T8
  • Not what we would expect!
  • Proof 1 using truth table (perfect induction)

X Y Z XY XZ YZ (XY)(XZ) X YZ
0 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 1 1 1 1
1 0 0 1 1 0 1 1
1 0 1 1 1 0 1 1
1 1 0 1 1 0 1 1
1 1 1 1 1 1 1 1
12
T8
  • Proof 2 Algebraically using proved theorems
  • (X Y)(X Z) (XY)X (XY)Z Why?
  • XXYXXZYZ
    T6, T8
  • XXYXZYZ
    T3, T6
  • X?1 X(YZ) YZ
    T1, T8
  • X(1(YZ)) YZ
    T8
  • X?1 YZ
    T6, T1
  • X YZ
    T1
  • Better
  • (X Y)(X Z) X XZ XY YZ
  • X(1ZY) YZ X YZ
  • Proof 3 Follows from T8 and duality.

13
Algebraic Proofs
  • T10 XYXY X(YY) X?1 X
  • T10 (XY)(XY) XXYXYYY
  • X(1YY) 0 X(1) X
  • T11 XYXZYZ XYXZ(XYZXYZ)
  • XY(1Z) XZ(1Z) XY XZ
  • T11 Do as an exercise.

14
Example using T9
  • (AB)C (AB)CD(EF) (AB)C
  • Treat (AB)C as X, treat D(EF) as Y
  • Or instead of using T9 recognize that
  • (AB)C (AB)CD(EF) (AB)C(1D(EF))
    (AB)C
  • It is not necessary to memorize all of these
    theorems.
  • Know through T5 and couple that with your
    knowledge of ordinary algebra.

15
XOR
  • X ? Y XY XY
  • X ? 0 X
  • X ? 1 X
  • X ? X 0
  • X ? X 1
  • X ? Y ? Z X ? (Y ? Z) Z ? X ?Y

X Y X?Y
0 0 0
0 1 1
1 0 1
1 1 0
16
How are these XOR gates used?
17
DeMorgans Theorem
  • These are the equations you must memorize
  • But notice that given one it is trivial to obtain
    the others.

18
Prove
X Y X Y XY XY (XY)
0 0 1 1 1 0 1
0 1 1 0 0 1 0
1 0 0 1 0 1 0
1 1 0 0 0 1 0
Alternative proof. Let X 0 then 1Y (0
Y) Let X 1, then 0Y (1Y) 1 0
19
DeMorgans Theorem in n variables
20
Generalizations
  • DeMorgans Theorem
  • Duality. If
  • then

21
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22
Shannons expansion theorem
Proof Consider f(xi) xif(0)xi xif(1)xi When
xi 0 then f(0)xi 1f(0)xi 0f(1)xi
f(0)xi When xi 1 then f(1)xi 0f(0)xi
1f(1)xi f(1)xi Thus, by perfect induction f(xi)
xif(0)xi xif(1)xi
23
Implementation example
  • Draw circuit directly from equations.
  • Draw circuit using only NAND gates.

24
Design example
  • Design a 3-input majority circuit

X Y Z F
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
25
Design example
  • Design a 3-input majority circuit

X Y Z F
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
26
Design example
  • Design a 3-input majority circuit

27
Design example
  • Design a 3-input majority circuit

X Y Z F
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
28
Design example
  • Design a 3-input majority circuit

29
Example
  • Show how to build an 8 input and gate using
    several two input and gates.
  • Which is better? Why?

30
Schmitt-trigger gates
  • contain input hysteresis. Useful for interfacing
    to slow or noisy signals.

31
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32
Tri-state buffers
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