ERD TWG Emerging Research Devices Telecon Meeting No. 6

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ERD TWG Emerging Research Devices Telecon
Meeting No. 6

• Jim Hutchby - Facilitating
• Thursday, February 26, 2009
• 900 am 1030 Eastern US Time

ERD WG Telecon January 15, 2009 Pacific US
Central US Eastern US Europe
Taiwan Japan/Korea 6am
8am 9am 3pm
10pm 11pm
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Feb. 26, 2009 ERD Telecon Meeting Objectives

• Complete discussion of the Logic Tables
• Discuss possibility that ERD/ERM Working Groups
  will conduct a process to select consensus
  Emerging Memory Technology Entries to highlight
  (similar to the process conducted last summer for
  Emerging Logic)
• Goal
• Scope
• Timeline
• Benchmarking

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February26, 2009 ERD Telecon Meeting Agenda

• 900pm Check in review meeting
  Hutchby Objectives/Agenda
• 905 Complete Logic Table Discussion
  Hiramoto-san
• proposed 3 Logic Tables decide
  Bourianoff
• 920 Review request to highlight
  consensus Garner
• selected Emerging Memory Technology
• Entries
• 930 Discuss the process and timeline
  for Hutchby
• benchmarking and selecting consensus
  Garner
• Emerging Memory Technology Entries
• to highlight
• Goal
• Scope
• Timeline
• Benchmarking
• 1030 Adjourn Meeting

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Japan ERD-WG Feedback on Logic Tables
Titles/Structure

• Japan ERD WG made discussions on the Table 2 and
  Table 3 which were proposed in the teleconference
  on January 22.
• Table 2 Non-Conventional FET, Charge-based
  Extended CMOS Devices
• Table 3 Non-FET, Non Charge-based Beyond CMOS
  Devices
• Our question was what "charge-based" means. In
  this definition, "charge-based" means that "the
  state variable is the charge" or "the information
  carrier is the charge"? If this is the
  "information carrier", we think this
  classification is very reasonable.

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ERD ITWG Emerging Research Devices Working
Group Proposal for Highlighting Promising
Technology Options for Emerging Research Memory
Devices

• Jim Hutchby Mike Garner
• Wednesday March 18, 2009

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Assessment of Promising Emerging Memory Devices

• Samsung, Hynix , and Micron proposed that the
  ERD/ERM identify memory technologies needing more
  focused support
• Proposal ERD ERM hold a workshop in October,
  09 to review and assess emerging research memory
  devices
• Goal Identify those emerging research memory
  technologies that need more focused research and
  resources
• Process Same Process as the Logic Assessment in
  2008
• White paper prepared by Champions on each
  emerging research memory technology and
  circulated prior to the technology review and
  selection meetings
• Champions present Pros, Cons and research needed
  for technology
• Friendly critic presents balanced assessment
• ERD member summarizes inputs for ERD/ERM WGs
• Face to Face Presentations Discussion
• Voting on Promising Technologies leading to
  consensus selection
• Identify Critical Research Needed

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Straw Candidate Emerging Research Memory
Technologies
DRAFT No. 2

• FeFET Memory
• Nanoelectromechanical Memory
• Fuse/Anti-fuse Memory
• Ionic Memory
• Atomic Switch / Electrochemical Metal Memory
• Molecular Memory
• Mott Transition Memory
• Ferroelectric Barrier Effects Memory

Replace this list with following DRAFT No. 3
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Straw Candidate Emerging Research Memory
Technologies

• Capacitive Memory
• FeFET Memory

• Resistive Memory
• Nanoelectromechanical
• STTMRAM
• Thermal PCM
• FUSE/Anti-FUSE
• Nanowire PCM
• Electrochemical Memory
• Cation migration
• Anion migration
• Electronic Effects Memory
• Charge trapping
• Mott Transition
• FE barrier effects
• Macromolecular Memory
• Molecular Memory

DRAFT No. 3
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DRAFT GOAL

• With the goal of providing input to resource
  allocation decisions, ERD/ERM WGs will conduct an
  in-depth review and evaluation of specific
  pre-competitive emerging research memory devices
  to highlight the most promising device
  technologies for detailed roadmapping and
  accelerated research and development.
  (Pre-competitive meaning those technologies
  capable of being scaled beyond the 15nm node.)

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DRAFT SCOPE

• The scope of the review/evaluation of emerging
  research memory technologies will include only
  those device technologies which are in the
  pre-competitive research stage, meaning they are
  scalable beyond the 15nm node. DELETE and are
  not in manufacturing development within any
  commercial organization. (Those technologies in
  manufacturing development by one or more
  companies are candidates for inclusion in
  PIDS/FEP.)

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Draft Timetable
1. Develop/decide process, milestones, timeline July 12, 2009
2. Develop invitation to advocates/proponents friendly critics Introduction Potential of technology fundamental limits Barriers Fundamental vs. technological/engineering Evaluation Criteria Definition of specific emerging research memory devices for roadmapping Readiness in 10 - 15 years July 31
3. Identify Major emerging research memory device candidates Strong technical proponent and friendly critic teams and their leaders Knowledgeable ERD/ERM mentor for each proponent team Key questions to be addressed by the teams Background materials for each technical candidate July 31
4. Issue invitations to team leaders, friendly critics, and ERD/ERM mentors and obtain their commitments Sept. 15
5. Obtain a white per background materials from each candidate technology proponent team for ERD/ERM WG review Jan. 15, 2010
6. ERD/ERM WG review candidate emerging research memory devices candidates based on white papers identify key questions using a formal process prior to Spring Europe FxF meeting. Mar. 15, 2010
7. Conduct a FxF review of categories with each proponent friendly critic making a presentation April yy, 2010 Spring FXF Mtg.
8. On second day of ERD FxF meeting, discuss/decide ERD/ERM WGs prioritized recommendation of narrowed emerging research memory devices options. This will include selection of specific devices for roadmapping within the recommended option April yy1,2010 Spring FXF Mtg.
9. Write submit report on ERD/ERM WGs recommendations May 31, 2010
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BACKGROUND SLIDES
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Proposed ERD WG Process for Highlighting
Candidate Technology Options for Emerging Memory
Devices

• Develop/decide process, milestones, timeline
• Identify
• Major memory technology candidates
• Strong technical proponent and friendly critic
  teams and their leaders
• Knowledgeable ERD/ERM mentor for each proponent
  team
• Key questions to be addressed by the teams
• Background materials for each technical candidate
• Develop invitation to proponents friendly
  critics
• Introduction
• Potential of technology fundamental limits
• Barriers Fundamental vs. technological/engineeri
  ng
• Evaluation Criteria
• Definition of specific devices for roadmapping
• Readiness in 10-15 years

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Proposed ERD WG Process for Highlighting
Candidate Technology Options for Emerging Memory
Devices

• Issue invitations to proponent and friendly
  critic team leaders and obtain their commitments
• Identify ERD/ERM Mentors 1 per candidate memory
  technology
• Obtain a white paper background materials from
  each candidate technology proponent team for ERD
  review
• ERD WG review candidate memory technologies using
  a formal process prior to FxF meeting to identify
  questions to be addressed in FxF meeting.

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Proposed ERD WG Process for Highlighting
Candidate Technology Options for Emerging Memory
Devices

• Conduct a FxF review of categories with each
  proponent friendly critic team making a
  presentation
• On second day of ERD FxF meeting, discuss/decide
  ERDs prioritized recommendation of narrowed
  memory technology options. Mentors will lead the
  discussion of their candidate technology
• Write submit report to the IRC on ERD WGs
  recommendations

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Decision Making Majority Voting Scheme

• Each member of ERD WG will be given a maximum of
  X votes to use in voting for their top X choices
  among the candidate technologies (Majority Voting
  scheme)
• ERD/ERM WG members present in the FIRST DAY
  Workshop the SECOND DAY meeting will be
  eligible to vote at SECOND DAY meeting, based on
  their personal technical judgment, independent of
  their corporate affiliation or regional
  representation,
• Only 0 or 1 vote can be cast for any candidate
  technology
• Member does not have to use all X votes, but
  cannot use more than X votes.
• All members can participate in the straw vote.
• The Candidate Technologies will be ordered
  according to which received the largest number of
  votes.
• Consensus approval will be our goal, but a 75
  affirmative vote will be required as a minimum.
  This is what is meant by the term approximate
  consensus.

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ERD Beyond CMOS Technology Selection MtgAgenda
SECOND DAY

• 920 Review Process for selecting beyond CMOS
• emerging technologies
• 945 Discuss Technologies
• 945 NEMS Switch Technology
• 1005 Spin Torque Transfer Technology
• 1025 Carbon-based Nanoelectronics
• 1045 Break
• 1100 Atomic Switch / Electrochemical Metal
  Switch
• 1120 Collective Spin Devices (including
  M-QCA)
• 1140 Single Electron Transistors
• 1200 CMOL and FPNI

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ERD Beyond CMOS Technology Selection Mtg
Agenda SECOND DAY (Contd)

• 1250 Preliminary vote on technologies
  Majority voting process
• 100 Discuss preliminary results
• 145 Second vote on technologies
• 200 Discuss the leading technologies
  resulting from vote
• 230 Final vote on the leading technology(ies)
  to determine if we have approximate consensus
  (75 of those voting) to recommend one or more
  for roadmapping and enhanced engineering
  development
• 245 Decide next steps in roadmapping the
  chosen technologies

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