Diode in Digital Logic Design

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Diode in Digital Logic Design
Section 3.1-3.3
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Schedule
Date Day Topic Section
1 1/14 Tuesday Diagnostic Test  
L 1/14 Tuesday Lab protocol, cleaning procedure, Linus/Cadence intro  
2 1/16 Thursday Fundamental concepts from Electric Circuits  
3 1/21 Tuesday Basic device physics 2.1
L 1/21 Tuesday I-V characteristics of a diode (Simulation)  
4 1/23 Thursday Drift/Diffusion current
5 1/28 Tuesday Physics of PN junction diode 2.2-2.3
L 1/28 Tuesday I-V Curve of a diode 2.3
6 1/30 Thursday Diode models, application of diodes in digital logic,review 3.1-3.3 (Highlights)
7 2/4 Tuesday Test 1 ?  
L 2/4 Tuesday Diode Logic  
8 2/6 Thursday Class Canceled! ???
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Outline

• Review
• Diode Model
• Applications of Diodes in Digital Logic
• OR2
• AND2

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Different ways of Crossing PN Junction
Diffusion
Diffusion
npni2
Drift
Drift
Majority carriers cross the pn junction via
diffusion (because you have the
gradient) Minority carriers cross the pn junction
via drift( because you have the E, not the
gradient)
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Reverse Biased Diode
Reverse Connect the terminal to the n
side. Depletion region widens. Therefore,
stronger E. Minority carrier to cross the PN
junction easily through drift. Current is
composed mostly of drift current contributed by
minority carriers. np to the left and pn to the
right. Current from n side to p side, the
current is negative.
E
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Forward Biased Diode
Depletion region shrinks due to charges from the
battery. The electric field is weaker. Majority
carrier can cross via diffusion Greater
diffusion current. Current flows from P side to N
side
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ISReverse Saturationleakage current
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Diode Models
(Ideal model)
(Exponential model)
(Constant voltage model)
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Choosing a Diode Model
Use the ideal model to develop a quick, rough
understanding of a circuit. If the ideal model
is not adequate, uses the constant voltage model,
which is sufficient for most cases.
Occasionally, we will use the exponential model
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Ideal Model of a Diode
(exponential model)
(ideal model)
An ideal diode will turn on even for the
slightest forward bias voltage. (VD0) An ideal
diode will turn off even for the slightest
reverse bias voltage. (VDlt0)
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Behavior of Ideal Diode
Ideal diode VanodegtVcathode Diode is
on VanodeltVcathode Diode is off An ideal current
experieincing VanodeVcathode, carries no current
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I/V Characteristics
A short--cant get a V to develop across a diode.
An Opencant get a current to flow.
A diode
VanodegtVcathode Diode is on VanodeltVcathode
Diode is off An ideal current experieincing
VanodeVcathode, carries no current In practice,
consider a slightly positive or negative voltage
to determine the response of a diode.
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Example 1 An OR Gate Realized By Diodes
00 V
00 V
Assume that 13 V 00 V Assume ideal diode
 
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Exercise 1 An OR Gate Realized By Diodes
13V
03 V
Assume that 13 V 00 V Assume ideal diode
What is Vout?
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Exercise 2 An OR Gate Realized By Diodes
13V
13 V
Assume that 13 V 00 V Assume ideal diode
What is Vout?
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Analysis of an OR Gate
Logic 13 V Logic 00V

• Observations
• If D1 is on, VAVOUT and VOUT1
• If D2 is on, VBVOUT and VOUT1.
• VOUT is 0 if and only if D1 and D2 are 0
• This is an OR gate.

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Cadence Simulation of an OR Gate
VA3 V VB3 V VOUT2.459 V3V
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Cadence Simulation of an OR Gate
VA3 V VB0 V VOUT2.424 V3V
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Cadence Simulation of an OR Gate
VA0 V VB0 V VOUT0 V
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Constant Voltage Model
If VD is less than VD, On, the diode behaves like
an open circuit. The diode will behave like an
open circuit for VDVD,on
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Cadence Simulation of an OR Gate
VA3 V VB0 V VOUT2.424 V Constant voltage
model 3V-0.6V2.4 V
If we assume a turn on voltage of 0.6 V, we are
not off by too much.
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Grid Control
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In Class Exercise
What kind of gate is this? Please assume ideal
diode model.
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Cadence Simulation of an AND Gate
VA3 V VB3 V VOUT3 V
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In Class Exercise
Assume that VA13V, VB00V Please assume
constant voltage model. What is the output
voltage?
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Cadence Simulation of an AND Gate
VA3 V VB0 V VOUT0.575 V