Radiation Effects in SiGe Devices

1
Radiation Effects in SiGe Devices Akil
Sutton, Marco Bellini, Ryan Diestelhorst, Anuj
Madan, Tom Cheng, Bongim Jun, and John D.
Cressler MURI Review Vanderbilt
University, Nashville, TN June 14, 2007
School of Electrical and Computer Engineering 777
Atlantic Drive, N.W., Georgia Institute of
Technology Atlanta, GA 30332-0250
USA cressler_at_ece.gatech.edu Tel [phone] /
http//users.ece.gatech.edu/cressler/
2
Outline

• Some Updates from the SiGe World
• New Avenues for RHBD in Bulk SiGe HBTs
• Probing the TID Damage Physics of SiGe HBTs
• Radiation Effects in Complementary SiGe HBTs
• Radiation Effects in SiGe MODFETs
• Progress / Plans

3
SiGe Strained Layer Epi
The Bright Idea!
Practice Bandgap Engineering
but do it in Silicon!
?EV
4
The SiGe HBT

• Conventional Shallow and Deep Trench Isolation
  CMOS BEOL
• Unconditionally Stable, UHV/CVD SiGe Epitaxial
  Base
• 100 Si Manufacturing Compatibility
• SiGe HBT Si CMOS on wafer

E B C
50 nm
SiGe
SiGe III-V Speed Si Manufacturing
Win-Win!
5
The SiGe Success Story

• Rapid Generational Evolution (full SiGe BiCMOS)
• Many DoD Opportunities!

- SiGe HBT Si CMOS (RF to mm-wave analog
digital for SoC / SoP)
gt 500 GHz Potential
4th
3rd
2nd
1st
Important Point 200-500 GHz _at_ 130 nm!
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SiGe mm-wave Comm

• Wireless 60 GHz (ISM band) Data Links (gt1.0
  Gb/sec!)

DARPA Funded
                 
Courtesy of IBM
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SiGe Radar Systems
Single Chip X-band SiGe T/R (4x4 mm2)
MDA Funded
Begs For SiGe!

Paradigm Shifting Impact for DoD Phased Array
Radar!
8
Extreme Environments

• Cryogenic Temperatures (e.g., 77K -196C)
• High Temperatures (e.g., 200C)
• Radiation (e.g., Earth orbit)

Cars
Drilling
Moon / Mars
CEV
Aerospace
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NASA ETDP Project
SiGe Integrated Electronics for Extreme
Environments
Objectives
Develop and Demonstrate Extreme Environment
Electronic Components Required for Distributed
Architecture Lunar / Martian Robotic /
Vehicular Systems Using SiGe HBT BiCMOS
Technology

• Extreme Environment Requirements (e.g., Lunar)
• 120C (day) to -180C (night) cycling (main
  focus)
• radiation (TID SEU tolerant)

Major Project Goals / Approach - prove
SiGe BiCMOS technology for 120C to -180C
applications - develop mixed-signal electronics
with proven extreme T rad capability -
develop best-practice extreme T range circuit
design approaches - deliver compact modeling
tools for circuit design (design suite) -
deliver requisite mixed-signal circuit components
(component library) - deliver robust
packaging for these circuits (integrated
multi-chip module) - demonstrate device
circuit package reliability per NASA specs
- develop a robust maturation path for NASA
mission insertion (TRL-6)
Goal Be Ready for NASA
Insertion
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Remote Electronics Unit
The ETDP Remote Electronics Unit, circa 2009
The X-33 Remote Health Unit, circa 1998
REU in connector housing!
Analog front end die
Digital control die
Conceptual integrated REU system-on-chip SiGe
BiCMOS die
Specifications
Goals

• 5 wide by 3 high by 6.75 long 101 cubic
  inches
• 11 kg weight
• 17.2 Watts power dissipation
• -55oC to 125oC

• 1.5 high by 1.5 wide by 0.5 long 1.1 cubic
  inches
• lt 1 kg
• lt 2-3 Watts
• -180oC to 125oC, rad tolerant

Suite of REU Sensor Types Temperature, Strain,
Pressure, Acceleration, Vibration, Heat Flux,
Position, etc.
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Total-Dose Response
Multi-Mrad Total Dose Hardness (with no
intentional hardening!) - ionization
displacement damage very minimal no ELDRS
either! Radiation Hardness Due to Epitaxial
Base Structure (not Ge) - thin emitter-base
spacer heavily doped extrinsic base very thin
base
63 MeV Protons
63 MeV Protons
                 
4th
3rd
200 GHz SiGe HBT
2nd
1st
63 MeV protons _at_ 5x1013 p/cm2 6.7 Mrad TID!
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Single Event Effects
Observed SEU Sensitivity in SiGe HBT Shift
Registers - low LET threshold high saturated
cross-section

50 GHz SiGe HBTs
Goal
The Achilles Heel of SiGe and Space!
1.6 Gb/sec
P. Marshall et al., IEEE TNS, 47, p. 2669, 2000
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The Intuitive Picture

• Collector-substrate (n/p-) Junction Is a Problem
  (SOI solves this)
• Lightly Doped Substrate Definitely Doesnt Help!

Heavy Ion (GeV cosmic ray)
Very Efficient Charge Collection!
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SEU TCAD to Circuits
New RHBD SiGe Latch
TCAD Ion Strike
OUT
DATA
CLOCK
UPSETS
Leverage NASA-NEPP, DTRA, NASA ETDP,
DARPA Georgia Tech, Auburn, Vanderbilt
Collaboration
Standard Master Slave Latch
SEU Soft
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SEU Tolerant Latches

• Reduce Tx-Tx Feedback Coupling Internal to the
  Latch
• Circuit Architecture Changes Transistor Layout
  Changes

Dual-Interleaved
Limiting Cross-section (no errors!)
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Outline

• Some Updates from the SiGe World
• New Avenues for RHBD in Bulk SiGe HBTs
• Probing the TID Damage Physics of SiGe HBTs
• Radiation Effects in Complementary SiGe HBTs
• Radiation Effects in SiGe MODFETs
• Progress / Plans

17
77K Proton SEU Testing
A Fundamental Question How Does Temperature
Affect SEU?
Experiment (63 MeV protons at 300K 77K) -
16-bit Shift Registers ? Standard M/S latch vs.
RHBD variant - data rates of 2-5 Gbit/s at
normal incidence
Leverage NASA-NEPP, DTRA, NASA ETDP
and Vanderbilt DURIP (test equipment) Paul
Marshalls able assistance was key!
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77K SEU Cross-Section

• Nearly 3x Increase in Upset Cross-section at 77K
• - not totally unexpected increased mobility
  lifetime
• RHBD SR Outperforms Standard M/S by gt 10x at 77K
  (4Gb/s)
• In Qualitative Agreement with Vanderbilt TCAD
  Simulations

Need Better Setup For 77K Broadbeam Heavy
Ion Measurements (in progress)
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Layout-Based RHBD

• Transistor-Level Layout Variations for QCOLL
  Reduction?
• - alternate pn junction (n-ring) designed to
  shunt electron charge away

Collaboration with Vanderbilt and Auburn Leverage
of NASA-NEPP DTRA NASA-ETDP Sandia
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Ion Microbeam Results

• Alternative Low Impedance Path Shunts Collected
  Electrons
• 20 25 Reduction in Peak and Integrated QCOLL
  at 3µm Spacing

Integrated QCOLL inside DT (a) and outside DT (b)
Peak QCOLL
Other Candidate Techniques to Be Measured Next
Week Stay Tuned!
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New RHBD Latches

• New Latch-Level Circuit Hardening Scheme
  Introduced
• Low Area / Power / Speed Overhead vs. Previous
  RHBD Designs

Capable of gt 20 Gbps Operation with RHBD!
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Outline

• Some Updates from the SiGe World
• New Avenues for RHBD in Bulk SiGe HBTs
• Probing the TID Damage Physics of SiGe HBTs
• Radiation Effects in Complementary SiGe HBTs
• Radiation Effects in SiGe MODFETs
• Progress / Plans

23
Mixed-Mode Stress
Simultaneous High Current High Voltage Stress
(JE VCB) - very complex damage response 3
different mechanisms (at least) - damages both
EB spacer and STI edge (just like radiation) -
complex dependence on VCB, JE, area, temperature,
etc. Q Can Mixed-Mode Stress Shed Light on
Radiation Damage?
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Mixed-Mode Annealing
Certain Stress Conditions Can Remove Radiation
Damage - induced forward inverse mode base
leakage current is removed - high voltage
high current self-heating plays a role
- effect observed in multiple SiGe technology
platforms / nodes
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Outline

• Some Updates from the SiGe World
• New Avenues for RHBD in Bulk SiGe HBTs
• Probing the TID Damage Physics of SiGe HBTs
• Radiation Effects in Complementary SiGe HBTs
• Radiation Effects in SiGe MODFETs
• Progress / Plans

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C-Si BJT Leverage

• Complementary (npn pnp) Si BJT Technology
  (C-Si)
• - very important in the core analog IC market
  (C-Si BiCMOS)
• - cost adder but still a huge win for this
  high-value-add market
• - enables a wide variety of best-of-breed
  precision analog blocks
• - enabling technology for many analog IC apps
• e.g., drivers, video amps, bus interfaces,
  DAC/ADC, op amps, etc.
• - enables better current sources
• - enables push-pull driver topologies
• - enables low voltage / low-power analog designs
• - enables low noise circuits (especially 1/f)
• - C-Si BJTs do not have to push the fT envelope
  (higher BV)
• - CMOS is not a natural fit as an analog device
  (V scaling et al.)

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An Observation
Until Very Recently, SiGe HBT npn SiGe HBT
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npn vs pnp SiGe HBTs

• npn no impact of band offset on minority
  carriers at low JC
• pnp strong impact of band offset on minority
  carriers at low JC

npn SiGe HBT
pnp SiGe HBT



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C-SiGe Technology 1

• Dual SiGe Epi Deposition (B doped for npn / AS
  doped for pnp)
• Thick Film SOI for Isolation
• Core Analog IC Design Platform for Texas
  Instruments

pnp SiGe HBT
npn SiGe HBT
PS Should be SEU Tolerant as Built!
npn SiGe HBT
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TIs BiCOM3X Platform
Irradiated with 63 MeV protons and 10 keV
X-rays Thick-film (1.25 mm) SOI Behavior
Similar to Bulk Devices Negligible dc and ac
degradation (300K)
We Will Be Starting Some Circuit Work in This
Platform Shortly
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Substrate Bias Effects
Substrate Bias (20 V) During Irradiation
Increases Inverse Gummel (STI) Degradation
(circuit impact?)
63 MeV Proton 10 keV X-rays
VS 20V
VS 20V
VS 0V
VS 0V
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C-SiGe Technology 2

• IHPs Complementary SiGe HBT Technology
• - low RC and CCS collector construction (no STI
  between E and C)
• - highly-tuned vertical doping profile
• - reduced phosphorus diffusion in the C-doped
  base

pnp SiGe HBT
npn SiGe HBT
1 B. Heinemann, et al, IEDM, pp. 117-120, 2003
33
IHP C-SiGe Technology

• Record Performance for a C-SiGe HBT Process
• - 170 GHz npn SiGe HBT 90 GHz pnp SiGe HBT!

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TID Effects in C-SiGe

• pnp SiGe HBTs Appear More Radiation Tolerant
  Than npns
• Q Are the Damage Mechanisms Fundamentally
  Different?

35
Outline

• Some Updates from the SiGe World
• New Avenues for RHBD in Bulk SiGe HBTs
• Probing the TID Damage Physics of SiGe HBTs
• Radiation Effects in Complementary SiGe HBTs
• Radiation Effects in SiGe MODFETs
• Progress / Plans

36
SiGe n-MODFETs
Collaboration with S. Koester at IBM
37
SiGe n-MODFETs

• Impact of Radiation-Induced Damage on RF
  Characteristics
• 10 keV X-ray irradiation degrades fmax but not fT
• degradation dependent on LSD rather than LG
  (S/D Resistance)

We Now Have SiGe p-MODFETs in Hand Stay Tuned!
38
Progress / Plans

• SiGe Offers Great Potential for Many DoD
  Applications

- SiGe HBT Si CMOS (RF to mm-wave analog
digital for SoC / SoP)

• Many Issues in SiGe Still Need Attention
• - improved understanding of basic damage
  mechanisms (TID SEE)
• - understand the effects of temperature on
  damage mechanisms / SEE
• - need to assess SET in analog/mixed-signal SiGe
  circuits
• - explore other SiGe HBT variants (SiGe HBT on
  SOI, C-SiGe, etc.)
• - explore other (new) SiGe-based devices (SiGe
  MODFETs, photonics, etc.)
• - develop new RHBD approaches (device circuit)
  for SEE mitigation
• - need improved 3D TCAD for understanding SEE
  (and TID)

• Lots of Leverage for SiGe Hardware / Testing
  Activity
• - many SiGe tapeouts (IBM, IHP, TI, Jazz, ST)
  devices circuits
• - DTRA / NASA-NEPP (Paul Marshall)
• - NASA SiGe ETDP Project (RHESE)
• - CFDRC SBIR (DTRA) for Improved TCAD for SEU /
  Cryo-T, etc.
• - excellent collaboration between Georgia Tech
  and Vanderbilt teams

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Publications
1 A. Madan, B. Jun, R.M. Diestelhorst, A.
Appaswamy, J.D. Cressler, R.D. Schrimpf, D.M.
Fleetwood, T. Isaacs-Smith, J.R. Williams, and
S.J. Koester, Radiation Tolerance of Si/SiGe
n-MODFETs, IEEE Nuclear and Space Radiation
Effects Conference, paper PF-8, 2007. 2 M.
Bellini, B. Jun, A.C. Appaswamy, P. Cheng, J.D.
Cressler, P.W. Marshall, B. El-Kareh, S. Balster,
and H. Yasuda, The Effects of Proton
Irradiation on the DC and AC Performance of
Complementary (npn pnp) SiGe HBTs on Thick-Film
SOI, IEEE Nuclear and Space Radiation Effects
Conference, paper PF-7, 2007. 3 R.M.
Diestelhorst, S. Finn, B. Jun, A.K. Sutton, P.
Cheng, P.W. Marshall, J.D. Cressler, R.D.
Schrimpf, D.M. Fleetwood, H. Gustat, B.
Heinemann, G.G. Fischer, D. Knoll, and B.
Tillack, The Effects of X-Ray and Proton
Irradiation on a 200 GHz / 90 GHz Complementary
(npn pnp) SiGeC HBT Technology, IEEE Nuclear
and Space Radiation Effects Conference, paper
F-5, 2007. 4 L. Najafizadeh, B. Jun, J.D.
Cressler, A.P.G. Prakash, P.W. Marshall, and C.J.
Marshall, A Comparison of the Effects of X-Ray
and Proton Irradiation on the Performance of SiGe
Precision Voltage References, IEEE Nuclear and
Space Radiation Effects Conference, paper PF-6,
2007. 5 J.A. Pellish, R.A. Reed, R.A. Weller,
M.H. Mendenhall, P.W. Marshall, A.K. Sutton, R.
Krithivasan, J.D. Cressler, S.M. Currie,
R.D. Schrimpf, K.M. Warren, B.D. Sierawski, and
G. Niu, On-Orbit Event Rate Calculations for
SiGe HBT Shift Registers, IEEE Nuclear and
Space Radiation Effects Conference, paper H-3,
2007. 6 A.K. Sutton, J.P. Comeau, R.
Krithivasan, J.D. Cressler, J.A. Pellish, R.A.
Reed, P.W. Marshall, M. Varadharajaperumal, G.
Niu, and G. Vizkelethy, An Evaluation of
Transistor-Layout RHBD Techniques for SEE
Mitigation in SiGe HBTs, IEEE Nuclear and Space
Radiation Effects Conference, paper C-6,
2007. 7 P. Cheng, B. Jun, A.K. Sutton, C. Zhu,
A. Appaswamy, J.D. Cressler, R.D. Schrimpf, and
D.M. Fleetwood, Probing Radiation- and Hot
Electron-Induced Damage Processes in SiGe HBTs
Using Mixed-Mode Electrical Stress, IEEE Nuclear
and Space Radiation Effects Conference, paper
PA-4, 2007. 8 T.S. Mukherjee, K.T. Kornegay,
A.K. Sutton, R. Krithivasan, J.D. Cressler, G.
Niu, and P.W. Marshall, A Novel Circuit-Level
SEU-Hardening Technique For Low-Voltage,
Ultra-High-Speed SiGe HBT Logic Circuits, IEEE
Nuclear and Space Radiation Effects Conference,
paper PC-6, 2007. 9 M. Varadharajaperumal, G.
Niu, X. Wei, J.D. Cressler, R.A. Reed, and P.W.
Marshall, 3-D Simulation of SEU Hardening of
SiGe HBTs Using Shared Dummy Collector, IEEE
Nuclear and Space Radiation Effects Conference,
paper H-4, 2007.