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Charge Measurement Using Commercial Devices

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Title: The Stability of AD6644 Author: Zonghan Shi Last modified by: jywu168 Created Date: 1/9/2003 8:01:09 PM Document presentation format: On-screen Show – PowerPoint PPT presentation

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Title: Charge Measurement Using Commercial Devices


1
Charge Measurement Using Commercial Devices
  • Jinyuan Wu, Zonghan Shi
  • For CKM Collaboration.
  • Jan. 2003

2
Introduction
FPGA
Q
AD6644
Integrator
PMT
HP1662C
3
The Circuit Board
AD6644
To Analyzer
Integrator (2) OPA660
Input Pulse
Integrator(1) AD8055
FPGA
EPC2LC20
Optical receiver SLC-25-4
Transceiver TLK1501
4
All test equipments
5
Outline
  • AD6644.
  • Integrator circuit (1).
  • ADC output.
  • Optical Transmission.

  • Integrator circuit (2).

6
Commercial ADC AD6644
  • The AD6644 is a high speed, high-performance,
    monolithic 14-bit analog-to-digital converter.
  • The guaranteed sample rate is 65 MSPS.
  • The sample rate in our tests is 35 MHz or
  • the sample time is 28.5ns.
  • Current FPGA technology is used in our
  • tests.

7
Integrator for ADC 1
100pf
36.5k
_
Input Pulse
OUTPUT
51
AD8055

GND
2.5V
  • It is a traditional integrator.
  • TRC36.5k x 100pf3.65us128 x 28.5ns
  • The output will send to AD6644 as a input signal.

8
Input Pulse
Output
9
Input Pulse
Output
10
Digital Process of AD6644 Output
ADC
ADCQ
Charge
D
D
DIFF
SUB
ABS
AND
OR
Higher Bits
Simple Zero Suppression Algorithm
  • Using FPGA hardware to find charge.

11
Data from HP 1662C Logic Analyzer
ADCQ
DIFF Charge
12
ADCQ
13
Charge
14
The Stability of AD6644
D(DATA FROM AD6644)
S
ABS
SUB
R(RESULT)
D
EN
256
  • DC input is sent to AD6644.
  • Above circuit is used to produce the mean of
    absolute difference.

15
Data From HP 1662C Logic Analyzer
Result
ADCQ
16
The Mean of Absolute Difference
17
ADC Output of DC Input
ADCQ
18
Standard Deviation
19
Optical Transmission
  • The ADC test board has same interface as the QIE
    test board.
  • Data have been successfully transmitted to Lab 6
    station.
  • A simpler test station is being built at WH14W.

20
DATA PROCESS BY USING DATA FROM LAB_6
21
Integrator for ADC 2
100pf
5V
36.5k
8
OUTPUT
150
3
Input Pulse
OPA660
51
2
Operational Amplifier Buffer
GND
17
GND
150
5
6
1
Similar as Ken Nelsons design except the
omission of the reset circuits.
51
GND
22
Input Pulse
Output
23
Input Pulse
Output
24
Thanks
END
25
Input Pulse
Output
Integrator (1)
26
Input pulse
Output
Integrator (2)
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