ENGG 1015 Tutorial

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ENGG 1015 Tutorial

• Digital Logic (II) (70 pages)
• 15 Oct
• Learning Objectives
• Learn about Boolean Algebra (SoP/PoS, DrMorgan's
  Theorem, simplification), Karnaugh map, Full
  adder, Flip Flop, Counter, Finite State Machine
• News
• Safety in Lab
• Ack. HKU ELEC1008, ISU CprE 281x, PSU CMPEN270,
  Wikimedia Commons

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Electrical Safety

• 5-10 ma can cause death
• Skin resistance can range from 1kO for wet skin
  to 500kO for dry skin.
• Death can result from as low as 50 volts
• Body can sense 9 volts under the right conditions
• NO Slippers, NO Sandals in Lab
• Report to TA or technician for any emergency case

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Boolean Algebra

• Boolean Algebra
• De Morgan's theorem
• Ways for simplification

A B B A AB BA
A (B C) (A B) C A (BC) (AB) C
A BC (A B) (A C) A (BC) AB AC
A AB A A (A B) A
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Digital Logic

• Equivalent logic using De Morgan's theorem
• AND NOT ? NOT OR
• OR NOT ? NOT AND
• NOT AND ? OR NOT
• NOT OR ? AND NOT

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Quick Checking
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Quick Checking
Any logic function may be implemented by using
only OR and NOT gates or only AND and NOT gates
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Questions for Boolean Algebra
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Solutions
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Boolean Algebra Simplification

• Sum of Products
• How to make 1?
• Better if less 1
• Products of Sum
• How to make 0?
• Better if less 0

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Boolean Algebra Using SOP and POS

• Find out the expression

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Boolean Algebra Using SOP and POS

• What about the alternative expression?

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Question 1 Boolean Algebra (SoP/PoS)

• Find an expression for F and

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Solution 1

• Sum of Products for F
• Product of Sums for F

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Solution 1

• Sum of Products for
• Product of Sums for

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Question 2 Boolean Algebra (DeMorgan's Theorem)

• Use DeMorgan's Theorem to simplify the following
  expressions

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Solution 2

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Question 3 Circuit representation of logic
equations

• Show how can be implemented with one
  two-input NOR and one two-input NAND gate.

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Solution 3

• Show how can be implemented with one
  two-input NOR and one two-input NAND gate.
• (How to convert ?)
• We need to apply De Morgans Theorem

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Question 4 Circuit representation of digital
logic

• a) Simplify the circuit shown in the figure using
  Boolean algebra.
• b) Change each NAND gate in the circuit of the
  figure to a NOR gate, and simplify the circuit
  using Boolean algebra.

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Solution 4a
Procedure 1) Obtain the Boolean expression from
the circuit2) Check if we need NAND/NOR gate3)
Simplify the expression by Boolean algebra and
adding double inversion
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Solution 4b

• First, we convert the circuit

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Solution 4b

• Then, we simplify the Boolean expression

(DeMorgan's Theorem)
(Expand)
(Simplify)
(Group, Group)
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Solution 4b
(Group, Group)
(Simplify)
(Expand)
(Simplify)
(Simplify)
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Question 5 Circuit representation of digital
logic

• Construct the given circuit using NAND gates only
• Top down approach ?
• Bottom up approach ?

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Solution 5a

• Top down Expanding the Boolean expression
• By DeMorgans Theorems,

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Solution 5b

• Bottom-up Construct NOT gate, AND gate and OR
  gate from NAND gate

iii)
i)
ii)
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Solution 5b

• Top-down and Bottom-up Same number of gate, same
  configuration, different approach

(cancelled)
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Question 6 Conversion of three representations

• Describe the function using Boolean expressions
• Draw the truth table and describe the function
  using sum of product

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Solution 6
Approach 1 Boolean simplification ? Find
TTApproach 2 Construct TT ? Find POS
(De Morgan)
(XOR expansion)
(De Morgan)
(De Morgan)
(expansion)
(grouping,expansion)
(cancellation)
POS
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Quick Checking

• Construct NOT gate, AND gate and OR gate from
  NAND gate

iii)
i)
ii)
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Karnaugh map

• Draw the table Fill in 0s and 1s Grouping
• Group one/two/four/eight/sixteen 1(s) only
• Use the least number of groups to group all
  numbers
• To group as many numbers as possible in a group

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Examples of Karnaugh maps
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Question 7 Simplification using K-map

• Simplify the following Boolean expressions using
  Karnaugh map.

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Solution 7
i)
A/B 0 1
0 0 0
1 1 1
ii)
A/BC 00 01 11 10
0 0 0 1 1
1 1 1 1 1
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Question 8 Logic Simplification

• Simplify the Boolean expression of the circuit
• Change each NAND gate in the circuit to a NOR
  gate, and simplify the Boolean expression of the
  circuit

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Solution 8a
(Expand)
(Group)
Solve by expression simplification
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Solution 8a
M N Q x
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1
From truth table to K-map
Solve by K-map
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Solution 8b
Solve by expression simplification
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Solution 8b
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Solution 8b
M N Q x
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
Solve by K-map
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Arithmetic Circuit

• Half Adder CSAB single bit
• C Carry S Sum

• Full Adder CoSABCi single bit
• e.g. Parallel Adder

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Question 9 Full Adder Design

• Construct the Boolean expression of a FA
• Verify it by constructing a truth table

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Solution 9
(Find out expression of S1 and C2)
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Solution 9
Any alternative approach?
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Solution 9

• Half Adder CSAB

A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
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Solution 9

• Full Adder CoSABCi

A B Ci Co S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Find out expression using SOP
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Quick Checking

• What is the simplest logic expression?

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Question 10 Flip Flop (FF)

• How many FFs are required to build a binary
  counter that counts from 0 to 1023?
• From 0 to 1023 ? Range 1024
• Number of FF required 10 (since 2101024)
• Determine the frequency at the output of the last
  FF of this counter for an input clock frequency
  of 2MHz.
• 1,2,,1024,1,2,,1024,,1,2,,1024 ? How many
  times?
• With 10 FFs, the range is 1024, therefore, the
  frequency division at the last FF will be 1/1024
  relative to the input check. Thus, output
  frequency 2MHz/1024 1953 Hz

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Question 10

• If the counter is initially at zero, what count
  will it hold after 2060 pulses?
• Every 1024 pulses the counter recycles through
  zero. Thus, after 2048 pulses the counter is back
  at count zero. Therefore, after 2060 pulses the
  counter will be at count 12 (i.e. 2060 1024
  1024 12)1,2,,1024,1,2,,1024,1,2,,11,12 ?
  2060 pulses

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Question 11Counter

• Figure a) shows a complete four-bit parallel
  adder with registers and b) shows the signals
  used to add binary numbers from memory and store
  their sum in the accumulator. Suppose the numbers
  being added are 1001 and 0101. Also assume that
  Co0. Describe what happen at t1, t2, t3, t4 and
  t5.

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Solution 11
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Finite State Machine (FSM)

• Circuit components
• Flip Flops (FFs) Clock Logic gates Input
  Output
• State
• Present state before clock
• Next state after clock
• State transition during clock
• n FFs ? 2n states

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A more complicatedFSM conversion example

• FSM / Truth table / Circuit

Store the state
Logic for state transition
Logic for output
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Steps in designing a state machine

• Start writing a state transition diagram
• An initial state
• Other states to keep track of various activities
• Transitions
• Generate a state transition table and a output
  table
• Write state transition table and output table in
  binary
• State assignment, i.e., the code used for each
  state
• Derive canonical sum-of-product expressions
• Draw the circuit

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From FSM to truth table

• Four states? 2 x 1bregister for q/q(q
  present)(q next)

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From FSM/Truth Table to circuit

• FFs Clock Logic gates Input Output

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Question 12 A simple FSM design

• Design a state machine that will repeatedly
  display in binary values 1, 3, 5, and 7
• How many states we need?
• S0, S1, S2, S3
• Simplified state transition diagram?

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Solution 12
Current Current Output Output Output
X Y L2 L1 L0
0 0 0 0 1
0 1 0 1 1
1 0 1 0 1
1 1 1 1 1
Current state Output
S0 (00) 1 (001)
S1 (01) 3 (011)
S2 (10) 5 (101)
S3 (11) 7 (111)

• Output table
• L2 XY'XY X
• L1 X'YXY Y
• L0 X'Y'X'YXY'XY 1
• State transition table
• X X'YXY'
• Y X'YXY' Y'

Current Current Next Next
X Y X Y
0 0 0 1
0 1 1 0
1 0 1 1
1 1 0 0
Current state Next state
S0 (00) S1 (01)
S1 (01) S2 (10)
S2 (10) S3 (11)
S3 (11) S0 (00)
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Question 13 A typical FSM design

• Design a 2-bit counter with input x that can be
• A down counter when x 0 (?11?10?01?00?11?)
• A Johnson counter when x 1 (?00?01?11?10?00?)

From FSM to Truth table
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Solution 13

• From truth tableto circuit

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Question 14 A practical FSM design

• Vending Machine
• Collect money, deliver product and change
• Vending machine may get three inputs, n, d, q
• Inputs are nickel (5c), dime (10c), and quarter
  (25c)
• Only one coin input at a time
• Product cost is 40c
• Does not accept more than 50c (blocks the coin
  slot)
• Returns 5c or 10c back
• Exact change appreciated

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Solution 14

• We are designing a Mealy state machine (i.e.,
  output depends on both current state and inputs).
• Suppose we ask the machine to directly return the
  coin if it cannot accept an input coin.
• Inputs I1 I2
• Represent the coin inserted
• 00 - no coin (0 cent), 01 nickel (5 cents), 10
  dime (10 cents), 11 quarter (25 cents)
• Outputs C1C2P
• C1C2 represent the coin returned
• P indicates whether to deliver product

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Solution 14

• States S1S2S3
• Represent the money inside the machine now
• 3 bits are enough to encode the states
• Notice the names (they need not be S0, S1.)
• S00 000, S05 001, S10 010, S15 011, S20
  100, S25 101, S30 110, S35 111

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Solution 14
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Solution 14
Input
Next state
Output
11/110
11/110 S35
11/000
S35
10/011 S00
01/000
01/001 S00
10/000

• S35 Currently the machine has 35 cents
• S35 Four possible inputs and three possible
  outputs
• e.g. 11/110 If we insert a quarter (11), then
  the machine should return one quarter and zero
  product (110)
• 35c (35 cents inside the machine now) 25c
  (insert 25 cents) 35c (35 cents inside the
  machine in the next state) 25c (return 25
  cents) 0c (return no product)

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Solution 14
11/110
11/110 S35
11/000
S35
10/011 S00
01/000
01/001 S00
10/000

• e.g. 10/011 If we insert a dime (11), then the
  machine should return one nickel and one product
  (011)
• 35c (35 cents inside the machine now) 10c
  (insert 10 cents) 0c (zero cent inside the
  machine in the next state) 5c (return 5 cents)
  40c (return one product)
• e.g. 01/110 If we insert a nickel (01), then the
  machine should return zero coin and one product
  (001)
• 35c (35 cents inside the machine now) 5c
  (insert 5 cents) 0c (zero cent inside the
  machine in the next state) 0c (return zero
  cent) 40c (return one product)

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Electrical Safety

• 5-10 ma can cause death
• Skin resistance can range from 1kO for wet skin
  to 500kO for dry skin.
• Death can result from as low as 50 volts
• Body can sense 9 volts under the right conditions
• NO Slippers, NO Sandals in Lab
• Report to TA or technician for any emergency case