Evolution of Electronic Systems from Chips to Cabinets

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Evolution of Electronic Systems from Chips to
Cabinets
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Course Review High-Speed Digital System Design
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Moores Law and Technology Sacling
the performance of an IC, including the number
components on it, doubles every 18-24 months with
the same chip price ... - Gordon Moore - 1960
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Microelectronics Evolution SoC Paradigm
Yesterdays chip is todays function block!
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The Electronic Package Evolution Traditional
Package
Package inductance 1 - 20 nH

• DIL (Dual In Line)
• Low pin count
• Large
• PGA (Pin Grid Array)
• High pin count (up to 400)
• Previously used for most CPUs
• PLCC (Plastic leaded chip carrier)
• Limited pin count (max 84)
• Large
• Cheap
• SMD
• QFP (Quarter Flat pack)
• High pin count (up to 300)
• small
• Cheap
• SMD

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The Electronic Package Evolution New Types of
Package

• BGA (Ball Grid Array)
• Small solder balls to connect to board
• small
• High pin count
• Cheap
• Low inductance
• CSP (Chip scale Packaging)
• Similar to BGA
• Very small packages

Package inductance 1 - 5 nH
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SOP Microelectronics for the 21st Century
YESTERDAY
TODAY
MCM
MCM
Discrete Packaging System-on-Package-on-Board
(SOPOB)
Integrated Digital Packaging SOB / MCM/DCA
Wafer-level Test Burn-in I/O
SLIM Package SOP
SLIM
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The Role of Packaging

• Different functional roles
• Power distribution supply power current to
  devices/chips
• Signal distribution connecting electrical and
  optical signals from chip to chip or to external
  devices
• Heat dissipation remove heat from the
  devices/chips, make system reliable
• Package protection protect devices or chips from
  environmental or mechanical damages

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Packaging hierarchy definitions
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Classification of IC Packaging
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First Level Packaging from Through-hole to
Surface Mount
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Package Evolution
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Second-Level Packaging From packaged chips on
PCB to multichip packaging
From TH-PCB package to SMT-PCB package to MCM
integration
Higher Performance, Mixed-Signal Integration,
Lower Power Others Reduce Cost save expensive
chip real-estate by reducing off-chip
drivers Lower Switching Noise (Ldi/dt) e.g.
Lpin 5nH in PLCC pin Lpin 9pH in flip-chip
bump
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State-of-the-Art High Performance Systems
f70mm
With Flip-Chip Connection
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Evolution of System Level Package Multi-Chip
Modules

• System level package from multi-level package to
  MCMs
• Increase integration level of system (smaller
  size)
• Decrease loading of external signals (higher
  performance, low power)
• No packaging of individual chips (lower
  inductance, higher frequency)

RF/Analog
Digital
Todays system
MCM
MCM
Yesterdays system
Mixed-Signal
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The Electronic Package Evolution The Future,
from MCM to SoP
System-on-Package
Multi-Chip Module

• Integrated L,R,C instead of embedded L,R,C
• Low inductance bonding instead of wire bonding
• Technology fusion (RF, Digital, MEMS, Optical)

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The System-on-Package Paradigm The Goals

• GOALS
• 10x Each
• Performance
• Cost
• Reliability
• Size

SoP Tomorrow
Time