Computer-Aided Verification of Electronic Circuits and Systems

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Computer-Aided Verification of Electronic
Circuits and Systems

• EE219A Fall 2002
• Professor Prof. Alberto Sangiovanni-Vincentelli
• Instructor Alessandra Nardi

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Major Verification Tasks
Design Concept
Is what I asked for what I want?
Design Verification
Design Description
Is what I asked for what I got?
Synthesis
Implementation Verification
Design Implementation
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Functional Verification

• Specification Validation Are the specifications
  consistent? Are they complete, i.e. if the design
  satisfies them are we sure that it is correct?
• Design Verification Is the entry level
  description of my design correct? Most common
  reason for chip failure.
• Implementation Verification Are the different
  levels of abstractions generated by the design
  process equivalent?

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Multi-Million-Gate Verification

• Moores Law
• Faster and more complex designs
• Test-vector size grows even faster than design
  size
• Time-to-market pressures will certainly not abate
• Clearly conflicts with the need to exhaustively
  verify a design before sign-off

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Verification Techniques
Goal Ensure the design meets its functional (F)
and timing (T) requirements at each of those
levels of abstraction

• Simulation (FT)
• Build a mathematical model of the components of
  the design, submit test vectors and solve the
  equations that give the output as a function of
  the input and of the models on a computer
• Formal Verification (F)
• Prove mathematically that
• A description has a set of properties
• Two descriptions at different levels of
  abstraction are functionally equivalent

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Verification Techniques
Goal Ensure the design meets its functional (F)
and timing (T) requirements at each of those
levels of abstraction

• Static Timing Analysis (T)
• Analyze circuits topological paths and check
  their timing properties and their impact on
  circuit delay
• Emulation (F)
• Map the design onto the components of the
  emulation machine, submit test vectors and check
  the outputs of the machine possibly physically
  connecting them to a system
• Prototyping (F)
• Build a hardware implementation of the design
  and operate it

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Simulation Perfomance vs Abstraction
Cycle-based Simulator
Event-driven Simulator
Abstraction
SPICE
Performance and Capacity
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Boolean Simulation Single-Processor

• Event-driven ("time-wheel" or static-ordered)
• Delay Model Emphasis (Inertial or Transport) is
  major differentiator.
• Today about 20-50K events/sec/Mip
• Cycle-based

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Cycle-based simulation

• Cycle-based simulators work off of a control and
  data-flow representation
• Treats everything in the design description as
  either clocked element or zero-delay
  combinational logic
• Advantages
• exceptionally fast
• same internal representation for both simulation
  and synthesis
• predicted results same as synthesized logic

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Cycle-based Algorithm

• Input design must be completely synchronous
• Only evaluate on the clock edge
• First evaluate all combinational logic
• Next latch values into state registers
• Repeat on next clock edge

clock
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Boolean Simulation Hardware Acceleration

• Quickturn-IBM (Cobalt) type
• 1M Event/sec.
• Requires fairly long compilation time

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Emulation

• Based on re-programmable FPGA technology.
• Only functional verification (no timing
  verification yet).
• Close to implementation performance.
• Can boot operating system, give look and feel for
  final implementation.
• Allows hardware-software co-design.

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Prototyping Techniques in Design Stages
Hardware Design Changes
Emulation
Cost
Software Simulation
Performance
Prototype Replication
Flexibility
time
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Board Level Rapid-Prototyping Environment

• Early feedback on customers requirements
• Early system integration
• In-field test on vehicle
• Virtual prototyping (co-simulation) and physical
  prototyping (emulation board)

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Simulation vs Formal Methods

• Degree of confidence in simulation depends on
  test vectors selected by the designers
• Formal methods most important for implementation
  verification
• Simulation cannot be replaced by formal
  verification especially for design verification
  specifications are often not given in rigorous
  terms and are not complete

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Analog Circuits A World Apart

• Analog circuits behavior specified in terms of
  complex functions time-domain, frequency-domain,
  distorsion, noise, power spectra.
• Required accuracy of models much higher than
  digital
• emerging paradigm Field Programmable Analog
  Array for prototyping (and more)

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Circuit Simulation

• Formulation of circuit equations
• STA, MNA
• Solution of linear equations
• LU factorization, QR factorization, Krylov
  Methods
• Solution of nonlinear equations
• Newtons method
• Solution of ordinary differential equations
• One-step and Multi-step methods

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Analog Circuit Simulation

• AC Analysis and Noise
• Simulation Techniques for RF
• Shooting-Newton
• Harmonic-Balance

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SPICE historyProf. Pederson with a cast of
thousands

• 1969-70 Prof. Roher and a class project
• CANCER Computer Analysis of Nonlinear Circuits,
  Excluding Radiation
• 1970-72 Prof. Roher and Nagel
• Develop CANCER into a truly public-domain,
  general-purpose circuit simulator
• 1972 SPICE I released as public domain
• SPICE Simulation Program with Integrated Circuit
  Emphasis
• 1975 Cohen following Nagel research
• SPICE 2A released as public domain
• 1976 SPICE 2D New MOS Models
• 1979 SPICE 2E Device Levels (R. Newton appears)
• 1980 SPICE 2G Pivoting (ASV appears)

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Circuit Simulation

• Types of analysis
• DC Analysis
• DC Transfer curves
• Transient Analysis
• AC Analysis, Noise, Distortion, Sensitivity

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Ideal Elements Reference Direction

• Branch voltages and currents are measured
  according to the associated reference directions
• Also define a reference node (ground)

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Branch Constitutive Equations (BCE)

• Ideal elements

Element Branch Eqn
Resistor v Ri
Capacitor i Cdv/dt
Inductor v Ldi/dt
Voltage Source v vs, i ?
Current Source i is, v ?
VCVS vs AV vc, i ?
VCCS is GT vc, v ?
CCVS vs RT ic, i ?
CCCS is AI ic, v ?
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Conservation Laws

• Determined by the topology of the circuit
• Kirchhoffs Voltage Law (KVL) Every circuit node
  has a unique voltage with respect to the
  reference node. The voltage across a branch eb is
  equal to the difference between the positive and
  negative referenced voltages of the nodes on
  which it is incident
• Kirchhoffs Current Law (KCL) The algebraic sum
  of all the currents flowing out of (or into) any
  circuit node is zero.

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Nodal Analysis - Example
R3
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Nodal Analysis Resistor Stamp
Spice input format Rk N N- Rkvalue
What if a resistor is connected to
ground? . Only contributes to the diagonal
KCL at node N KCL at node N-
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Nodal Analysis VCCS Stamp
Spice input format Gk N N- NC NC-
Gkvalue
vc -
KCL at node N KCL at node N-
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Nodal Analysis Current source Stamp
Spice input format Ik N N- Ikvalue
N N-
N N-
Ik
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Nodal Analysis (NA)

• Advantages
• Yn is often diagonally dominant and symmetric
• Eqns can be assembled directly from input data
• Yn has non-zero diagonal entries
• Yn is sparse
• Limitations
• Conserved quantity must be a function of node
  variable
• Cannot handle floating voltage sources, VCVS,
  CCCS, CCVS

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Modified Nodal Analysis (MNA)
How do we deal with independent voltage sources?
Ekl
k l

-
k
l
ikl

• ikl cannot be explicitly expressed in terms of
  node voltages ? it has to be added as unknown
  (new column)
• ek and el are not independent variables anymore ?
  a constraint has to be added (new row)

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MNA Voltage Source Stamp
Spice input format ESk N N- Ekvalue
0 0 1
0 0 -1
1 -1 0
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Modified Nodal Analysis (MNA)

• How do we deal with independent voltage sources?
• Augmented nodal matrix

In general
Some branch currents
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MNA General rules

• A branch current is always introduced as and
  additional variable for a voltage source or an
  inductor
• For current sources, resistors, conductors and
  capacitors, the branch current is introduced only
  if
• Any circuit element depends on that branch
  current
• That branch current is requested as output

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MNA CCCS and CCVS Stamp
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MNA An example
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MNA An example
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Modified Nodal Analysis (MNA)

• Advantages
• MNA can be applied to any circuit
• Eqns can be assembled directly from input data
• MNA matrix is close to Yn
• Limitations
• Sometimes we have zeros on the main diagonal and
  principle minors may also be singular.

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Systems of linear equations

• Problem to solve M x b
• Given M x b
• Is there a solution?
• Is the solution unique?

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Systems of linear equations

• Find a set of weights x so that the weighted sum
  of the
• columns of the matrix M is equal to the right
  hand side b

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Systems of linear equations - Existence
A solution exists if
There exist weights, x1, ., xN, such that

• A solution exists when b is in the span of the
  columns of M

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Systems of linear equations - Uniqueness
Suppose there exist weights, y1, ., yN, not all
zero, such that
Then Mx b ? Mx My b ? M(xy) b
A solution is unique only if the columns of M
are linearly independent.
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Systems of linear equations Square matrices

• Given Mx b, where M is square
• If a solution exists for any b, then the
  solution for a specific b is unique.

For a solution to exist for any b, the columns of
M must span all N-length vectors. Since there are
only N columns of the matrix M to span this
space, these vectors must be linearly independent.
A square matrix with linearly independent columns
is said to be nonsingular.
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Application Problems

• Matrix is n x n
• Often symmetric and diagonally dominant
• Nonsingular of real numbers

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Methods for solving linear equations

• Direct methods find the exact solution in a
  finite number of steps
• Iterative methods produce a sequence a sequence
  of approximate solutions hopefully converging to
  the exact solution

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Gaussian Elimination Basics

• Gaussian Elimination Method for Solving M x b
• A Direct Method Finite Termination for
  exact result (ignoring roundoff)
• Produces accurate results for a broad range of
  matrices
• Computationally Expensive

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Gaussian Elimination Basics

• Reminder by 3x3 example

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Gaussian Elimination Basics Key idea

• Use Eqn 1 to Eliminate x1 from Eqn 2 and 3

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GE Basics Key idea in the matrix
Remove x1 from eqn 2 and eqn 3
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GE Basics Key idea in the matrix
Remove x2 from eqn 3
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GE Basics Simplify the notation
Remove x1 from eqn 2 and eqn 3
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GE Basics Simplify the notation
Remove x2 from eqn 3
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GE Basics GE yields triangular system


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GE Basics Backward substitution
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GE Basics RHS updates
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GE basics summary

• (1) M x b
• U x y Equivalent system
• U upper trg
• (2) Noticed that
• Ly b L unit lower trg
• U x y
• LU x b ? M x b

GE
? Efficient way of implementing GE LU
factorization
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Gaussian Elimination Basics
Solve M x b Step 1 Step 2
Forward Elimination Solve L y
b Step 3 Backward Substitution
Solve U x y
Note Changing RHS does not imply to recompute LU
factorization
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LU Decomposition Code
dimensione delle matrici DIM3 Per ora
generiamo una matrice di numeri
casuali Mrand(DIM DIM) inizializzazione
di L e U L zeros(DIM DIM) U zeros(DIM
DIM) ciclo per la decomposizione for
(i1DIM) i indica l'elemento della
diagonale della matrice M L(i,i) viene
normalizzato ad 1 L(i,i) 1 si calcola
U(i,i) U(i,i) M(i,i) - L(i,)U(,i) for
(ji1DIM) si procede utilizzando la
riga i-esima di M a partire dalla colonna
i1 per il calcolo di U(i,) U(i,j)
M(i,j) - L(i,)U(,j) in maniera
analoga si utilizza la colonna i-esima di M a
partire dalla riga i1 per il calcolo di
L(,i) L(j,i) (M(j,i) -
L(j,)U(,i))/U(i,i) end end
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LU Source-row and Target-row
Source-Row oriented approach
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LU Decomposition - Complexity
dimensione delle matrici DIM3 Per ora
generiamo una matrice di numeri
casuali Mrand(DIM DIM) inizializzazione
di L e U L zeros(DIM DIM) U zeros(DIM
DIM) ciclo per la decomposizione for
(i1DIM) i indica l'elemento della
diagonale della matrice M L(i,i) viene
normalizzato ad 1 L(i,i) 1 si calcola
U(i,i) U(i,i) M(i,i) - L(i,)U(,i) for
(ji1DIM) si procede utilizzando la
riga i-esima di M a partire dalla colonna
i1 per il calcolo di U(i,) U(i,j)
M(i,j) - L(i,)U(,j) in maniera
analoga si utilizza la colonna i-esima di M a
partire dalla riga i1 per il calcolo di
L(,i) L(j,i) (M(j,i) -
L(j,)U(,i))/U(i,i) end end
?DIM3
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GE Basics Fitting the pieces together
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GE Basics Fitting the pieces together
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LU factorization Basics Picture
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LU BasicsSource-row oriented approach algorithm
For i 1 to n-1 For each source
row For j i1 to n For each target
row below the source For k
i1 to n For each row element beyond Pivot

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LU BasicsTarget-row oriented approach algorithm
For i 2 to n For each target
row For j 1 to i-1 For each source
row above the target For k
j1 to n For each row element beyond Pivot

Pivot
Multiplier
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LU Source-row and Target-row
Source-Row oriented approach
Target-Row oriented approach
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LU Basics Computational Complexity
For i 1 to n-1 For each Row For
j i1 to n For each target Row below
the source For k i1 to n
For each Row element beyond Pivot

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LU Basics Limitations of the naïve approach

• Zero Pivots
• Small Pivots (Round-off error)
• both can be solved with partial pivoting

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LU Basics Partial pivoting for zero pivots
At Step i
Multipliers
Factored Portion
Row i
(L)
Row j
What if Cannot form
Simple Fix (Partial Pivoting) If
Find
Swap Row j with i
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LU Basics Partial pivoting for zero pivots
Two Important Theorems

• ) Partial pivoting (swapping rows) always
  succeeds if M is non singular
• ) LU factorization applied to a diagonally
  dominant matrix will never produce a zero pivot

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Summary

• Existence and uniqueness review
• Gaussian elimination basics
• GE basics
• LU factorization
• Pivoting