Schmoo Plots

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332578 Deep SubmicronVLSI DesignLecture 19
Advanced Testing

• Schmoo Plots
• Automatic Test Equipment
• Additional JTAG Instructions
• Summary

Michael Bushnell and David Harris Rutgers U. and
Harvey Mudd College
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Source Essentials of Testing for Logic, Memory,
and Mixed-Signal Circuits by Bushnell Agrawal,
Springer, 2000
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Shmoo Plots

• How to diagnose failures?
• Hard to access chips
• Picoprobes
• Electron beam
• Laser voltage probing
• Built-in self-test
• Shmoo plots
• Vary voltage, frequency
• Look for cause of
• electrical failures

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Manufacturing Test

• A speck of dust on a wafer is sufficient to kill
  chip
• Yield of any chip is lt 100
• Must test chips after manufacturing before
  delivery to customers to only ship good parts
• Manufacturing testers are
• very expensive
• Minimize time on tester
• Careful selection of
• test vectors

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Testing Your Chips

• If you dont have a multimillion dollar tester
• Build a breadboard with LEDs and switches
• Hook up a logic analyzer and pattern generator
• Or use a low-cost functional chip tester

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TestosterICs

• Ex TestosterICs functional chip tester
• Designed by clinic teams and David Diaz at HMC
• Reads your IRSIM test vectors, applies them to
  your chip, and reports assertion failures

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Automatic Test Equipment Components

• Consists of
• Powerful computer
• Powerful 32-bit Digital Signal Processor (DSP)
  for analog testing
• Test Program (written in high-level language)
  running on the computer
• Probe Head (actually touches the bare or packaged
  chip to perform fault detection experiments)
• Probe Card or Membrane Probe (contains
  electronics to measure signals on chip pin or pad)

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ADVANTEST Model T6682 ATE
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Additional JTAG Instructions
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CLAMP Instruction

• Purpose Forces component output signals to be
  driven by boundary-scan register
• Bypasses the boundary scan chain by using the
  one-bit Bypass Register
• Optional instruction
• May have to add RESET hardware to control
  on-chip logic so that it does not get damaged
  (by shorting 0s and 1s onto an internal bus,
  etc.)

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HIGHZ Instruction

• Purpose Puts all component output pin signals
  into high-impedance state
• Control chip logic to avoid damage in this mode
• May have to reset component after HIGHZ runs
• Optional instruction

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BYPASS Instruction

• Purpose Bypasses scan chain with 1-bit register

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Summary

• Schmoo Plots Useful for improving chip yield
• Automatic Test Equipment essential for testing
  chips
• Functional test verify system hardware,
  software, function and performance pass/fail
  test with limited diagnosis high (100)
  software coverage metrics low (70) structural
  fault coverage.
• Diagnostic test High structural coverage high
  diagnostic resolution procedures use fault
  dictionary or diagnostic tree.