Systolic Arrays

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Systolic Arrays Matrix-Vector Multiplication

• Cathy Yen

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Introduction

• The developments in microelectronics have
  revolutionized computer design
• Component density has been doubling every one to
  two years
• A multiplier can fit on a very large scale
  integrated (VLSI) circuit chip
• It is feasible to build low-cost,
  special-purpose, peripheral devices to solve
  sophisticated problems.

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What is Systolic Arrays?

• (By analogy with the regular pumping of blood by
  the heart) .
• Systolic arrays are examples of
  single-instruction-multiple-data machines .
• special purpose machines used mainly in dedicated
  equipment and not in general purpose computers. .
• A systolic array is a form of parallel
  architecture with a regular, nearest-neighbour
  interconnection .

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What do Systolic Arrays do?

• data compression Royals
• Discrete Cosine Transforms Chang, Chang
• Fourier transformations Peng, Lippert
• genetic algorithms Megson
• image processing and detection systems Hwang ,
  Cheng, Ker, Diamantaras, Liu, Gasteratos, Kim

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What do Systolic Arrays do?

• matrix inversion Margaritis
• matrix multiplication Wan
• shortest-path problems Myoupo
• signal processing Li, Robert, Speiser
• tridiagonal banded matrix multiplication Evans,
  Naritomi and
• sorting.
•  

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The functioning of a systolic array depends on

• the structure of the individual cells that are
  replicated across the array
• how the data is moved across the array (a
  function of how they are connected) and
• how the data is feed into the array.

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a Closer look at Systolic Arrays

• Processing Elements

a
y
a
x
y
y
x
x
a
x
y
a
matrix-vector matrix
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a Closer look at Systolic Arrays

• Processor Arrays

Linearly connected
Orthogonally connected
Hexagonally connected
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Matrix-Vector Multiplication

• (AX Y)

a11 a12 a13 x1 y1 a21
a22 a23 x2 y2 a31
a32 a33 x3 y3
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Matrix-Vector Multiplication(AX Y)

• Yi(1) 0, Ts (n)
  wn (2n-1)n 2n2-n
• Yi(k1) yi(k) aikxk
  O(wn)
• Yi yi(n1)

a11 a12 a13 x1 y1 a21
a22 a23 x2 y2 a31
a32 a33 x3 y3
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Matrix-Vector Multiplication(AX Y)

• Bandwidth w nn1 2n-1 ? O(n)
  
• Tp(n) 2n w ? 2n(2n-1) ? 4n-1 O(n)

a11 a12 a13 x1 y1 a21
a22 a23 x2 y2 a31
a32 a33 x3 y3
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Matrix-Vector Multiplication(AX Y)
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Matrix-Vector Multiplication(AX Y)

• Y1 a11x1 a12x2 a13x3
• Y2 a21x1 a22x2 a23x3
• Y3 a31x1 a32x2 a33x3

a11 a12 a13 x1 y1 a21
a22 a23 x2 y2 a31
a32 a33 x3 y3
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Matrix-Vector Multiplication(AX Y)

• Ts (n) wn (2n-1)n 2n2-n O(wn)
• Tp(n) 2n w ? 2n(2n-1) ? 4n-1 O(n)

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Conclusion

• On the positive side systolic arrays are highly
  compact, robust, provide high performance, and
  can be massively and cheaply produced as they are
  accessible via VLSI technology.
• On the negative side the arrays are inflexible to
  the type of problem they solve and often are
  inflexible to the size of the problem they
  address.

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Conclusion

• Systolic arrays may be used to solve many regular
  problems containing repetitive operations on
  large arrays of data. They are not yet suited to
  general purpose computers.

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References

• H.T. Kung and C.E. Leiserson, Systolic arrays
  (for VLSI), pp. 271-276
• Manohar, S. Baudet, G. Computers and Digital
  Techniques, IEE Proceedings E Volume 137 Issue
  4 , July 1990 Page(s) 277 282
• Milovanovic, I.Z. Milovanovic, E.I. Tokic,
  T.I. Stojanovic, N.M. Stojcev, M.K. Modern
  Problems of Radio Engineering, Telecommunications
  and Computer Science, 2002. Proceedings of the
  International Conference , 18-23Feb. 2002
  Page(s) 90 -92