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Instruction Representation

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A numeric code representing a particular instruction or ... 000E A0 0002 R mov al,b. 0011 8A 26 0002 R mov ah,b. 0015 BB 0003 mov bx,3. 0018 B1 03 mov cl,3 ... – PowerPoint PPT presentation

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Title: Instruction Representation


1
Instruction Representation
  • Assembly Language Programming
  • University of Akron
  • Dr. Tim Margush

2
Machine Language Codes
  • Each instruction is coded as one or more bytes
  • The first byte is generally an OpCode
  • A numeric code representing a particular
    instruction or class of instructions
  • Additional bytes may affect the action of the
    instruction or provide information about the data
    acted upon by the instruction

3
Variable Format Instructions
  • The meaning of bits in an instruction varies
    depending on the instruction
  • The number of bytes in an instruction varies
    depending on the needs of the instruction
  • Basic 8086 instruction format

low disp/data
hi disp/data
low data
hi data
4
Opcode
  • 8086 Opcodes are 6, 7, or 8 bits
  • d(irection) bit - used for instructions that code
    a register as one of the operands
  • 1 register is destination, 0 register is
    source
  • w(idth) bit - used to distinguish byte(0)/word(1)
    operands
  • 7-bit opcodes do not use d, 8-bit opcodes do not
    use either d or w

5
mod/reg/r/m
  • The second byte of some instructions is divided
    into three fields
  • The reg field, together with the w bit (in the
    opcode), specifies a register operand
  • If there is only one register operand, d
    specifies whether it is the source or destination
  • If there are two registers, reg specifies the
    destination register

6
reg
  • reg w1 w0
  • 000 AX AL
  • 001 CX CL
  • 010 DX DL
  • 011 BX BL
  • 100 SP AH
  • 101 BP CH
  • 110 SI DH
  • 111 DI BH
  • The reg field contains a number between 0 and 7.
  • Depending on the w-bit setting, this selects one
    of 8 registers as an operand used by the
    instruction

7
register/memory
  • Interpretation depends on mod field contents
  • mod 11 r/m(same code as reg)
  • second operand is the specified register
  • mod 00 r/m110
  • second argument is the address specified in the
    the next two bytes of the instruction, direct
    near addressing - DSoffset (Unless segment
    override is in effect)

8
More mod/r/m
  • All other combinations specify indirect
    addressing
  • Target Address BX/BPSI/DIdisp
  • mod specifies the size of the displacement which
    is coded in the next one or two bytes of the
    instruction
  • mod r/m mode
  • 00 110 direct
  • 00 --- no disp
  • 01 all byte disp
  • 10 all word disp
  • 11 all register
  • (see next table)

9
Indirect Address Modes
  • r/m seg addr
  • 000 DS BXSI
  • 001 DS BXDI
  • 010 SS BPSI
  • 011 SS BPDI
  • 100 DS SI
  • 101 DS DI
  • 110 SS BP
  • 111 DS BX
  • if mod 01 or 10
  • disp is added
  • if mod 00
  • no displacement
  • Exception mod 00 and r/m 110
  • direct addressing using a 16-bit offset and DS
    register

10
Immediate Operands
  • Data is stored in the instruction in the byte or
    bytes immediately following the address
    information
  • If bytes 3 or 4 contain a displacement the data
    follows the displacement info
  • data may be a single byte or a word

11
Disclaimer
  • Not all instructions conform to the formats
    described so far! The 8086 instruction set is
    very complex. Some opcodes are only 4-5 bits in
    length, and others are 16-bits. We have hit only
    the highlights here.

12
MOV
  • mov reg,reg 2 100010dw modregr/m
  • mov reg,mem 3-4 100010dw modregr/m disp(1-2)
  • mov reg,imm 2-3 1011wreg data(1-2)
  • mov acc,mem 3 1010000w disp(2)
  • mov mem,acc 3 1010001w disp(2)
  • mov mem,imm 4-6 1100011w modregr/m disp(1-2)
    data(1-2)

13
Sample Machine Codes
  • 0000 000A a dw 10
  • 0002 00 b db ?
  • .code
  • 0000 8B DF mov bx,di
  • 0002 8A F9 mov bh,cl
  • 0004 8B 1E 0000 R mov bx,a
  • 0008 8A 26 0002 R mov ah,b
  • 000C 8B 12 mov dx,sibp
  • 000E A0 0002 R mov al,b
  • 0011 8A 26 0002 R mov ah,b
  • 0015 BB 0003 mov bx,3
  • 0018 B1 03 mov cl,3
  • 001A C7 06 0000 R 0064 mov a,100
  • 0020 C6 06 0002 R FF mov b,255

14
PC-Relative Addressing
  • The jump instructions use an addressing mode
    called PC-relative or self-relative
  • The machine code contains a displacement that is
    added to the current IP to cause a jump to occur
  • The assembler must calculate this displacement

15
JMP
  • Direct intrasegment short
  • 11101011 disp
  • Direct intrasegment (near)
  • 11101001 disp-low disp-high
  • Indirect intrasegment
  • 11111111 mod 100 r/m
  • Indirect intersegment
  • 11111111 mod 101 r/m
  • Direct intersegment (far)
  • 11101010 offset-low offset-high seg-low seg-high

16
JMP Example
  • 003C LP
  • ...
  • 0054 JMP LP
  • ...
  • 010C JMP ELP
  • ...
  • 0406 ELP
  • 0406 JMP XYZ
  • disp3C-56E6
  • 11101011 11100110
  • disp406-10E2F8
  • disp406-10F2F7
  • 11101001 11110111 00000010
  • Assume XYZ is a far label at 01C50094
  • EA 94 00 C5 01

17
Conditional Jumps
  • These are always 2 bytes (8086-80286)
  • opcode disp
  • JA 01110111 disp
  • JE 01110100 disp
  • Jwhatever 0111xxxx disp
  • 80386 and later processors allow near jumps
  • opcode is 1000xxxx disp-lo disp-hi
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