Avrora Scalable Sensor Simulation with Precise Timing

1
AvroraScalable Sensor Simulation with Precise
Timing

• Ben L. Titzer
• UCLA
• CENS Seminar, February 18, 2005
• IPSN 2005

2
Background - WSNs

• Wireless Sensor Networks
• Microcontroller and battery powered
• Wireless communication
• Event-driven programming model
• Programmed with TinyOS and nesC

Mica2 Dot - based on Atmel AVR microcontroller
3
Background - Microcontrollers

• Microcontrollers are small
• 128KB code, 4KB RAM, 4KB EEPROM
• Processor, memory, IO on a single chip
• 4 - 16mhz clockspeed
• Interrupt-driven programming model
• No operating system

4
Motivation

• Developing sensor software is hard
• Constrained resources, bare hardware
• Narrow interface for debugging
• Delicately timed driver code
• Distributed communication
• Precise measurements are difficult
• Current tools do a poor job
• TOSSIM, AtEmu

5
The Question

• Can we achieve simulation of entire sensor
  networks?

6
The Question

• Can we achieve simulation of entire sensor
  networks?
• --1 And make it precise?

7
The Question

• Can we achieve simulation of entire sensor
  networks?
• --1 And make it precise?
• --2 And make it flexible?

8
The Question

• Can we achieve simulation of entire sensor
  networks?
• --1 And make it precise?
• --2 And make it flexible?
• --3 And make it fast?

9
The Question

• Can we achieve simulation of entire sensor
  networks?
• --1 And make it precise?
• --2 And make it flexible?
• --3 And make it fast?
• --4 And make it scalable?

10
The Goals of Avrora

• Build a simulator for sensor networks
• Cycle accurate
• Energy accurate
• Simulates sensor devices
• Scales to large sensor networks
• Allow detailed profiling and instrumentation

11
1 Precision

• Can we make it precise?
• Instruction-level simulation
• Cycle accurate
• Accurate device models
• Accurate radio / interference model
• Well-known

12
2 Flexibility

• Can we make the simulator flexible?
• Well-designed software architecture
• Clear interfaces
• Implemented in Java, object-oriented
• Instrumentation infrastructure
• Nonintrusive Precision Instrumentation of
  Microcontroller Software submitted to LCTES 2005

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Avrora Software Architecture
Platform
On-chip devices are controlled by the program
through IOReg objects Off-chip devices are
controlled through individual pins or through
UART and SPI interfaces Time-triggered behavior
is accomplished by inserting events into the
event queue
Microcontroller
Simulator
Interpreter
Event queue interface
IOReg interface
SPI
Ports
Timer
On-chip devices
Pin interface
SPI interface
Radio
LEDs
Off-chip devices
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3 Speed - Event Queue

• How can we achieve speed while retaining cycle
  accuracy?
• Naïve implementation scales poorly
• Event interface simplifies devices
• Better performance
• Key to achieving parallelism for sensor network
  simulations

15
Event Queue Illustration
Simulator
DeltaQueue
Interpreter
Timer0Event
ProfilingEvent
UARTEvent

• Interpreter tracks cycles consumed by each
  instruction
• Decrement head of queue and fire event(s) when
  necessary
• Retains cycle accuracy
• Allows for sleep optimization

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Single-node Performance
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4 Scalability

• Sensor networks have many nodes (10s-1000s)
• Software controlled radios
• Micro-second level interactions
• High-fidelity simulation needed for precise
  measurements

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The AtEmu Approach

• Introduce global clock
• Step all nodes one clock cycle at a time
• Compute radio waveform (bit level)
• Problems
• Slow
• Scales poorly - O(n2) interactions
• No parallelism

19
Observations

• Communication has latency
• Nodes only influence each other through
  communications
• Other than that, nodes run in parallel
• Hmm.

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Parallel Simulation

• Allow all nodes to run in parallel
• One thread per node
• Extends single-node simulation to network
• Better overall simulation performance
• New Problem
• Synchronization necessary to preserve timing and
  order of communications
• Efficient solutions?

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Send-Receive Problem

• Nodes send bytes to each other
• No node should be allowed to run too far ahead of
  other nodes that might try to send a byte to it

TkL
T0
Tk
Send A1
Node A
Node B
Node B should never be more than L cycles ahead
of A
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Sampling Problem

• Nodes can sample current radio traffic
• Sample cannot be computed until all possible
  transmitters have passed the time when sampling
  was begun

TkS
T0
Tk
Send A1
Node A
Node B
Node B cannot complete sample until node A passes
time k
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Reality

• RSSI sampled infrequently
• Nodes both send and receive
• Latency L to send a byte on mica2
• 7372800hz / 2400bps 3072 cycles
• Sampling time S to estimate RSSI
• 13 ADC cycles 64 832 cycles

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Two Approaches

• Synchronization Intervals
• Threads cant run too far ahead
• Period has to be smaller than L
• Utilize event queue of each simulator
• Wait for Neighbors
• Each thread waits for neighbors when necessary
  (sample or receive)
• Requires fast global data structure
• Avrora uses both

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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
Node C
Node D
Node E
26
Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
RSSI
Node C
Node D
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
RSSI
Send C1
Node C
Node D
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
RSSI
Send C1
Node C
Node D
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
RSSI
Send C1
Node C
Node D
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
Send C2
RSSI
Send C1
Node C
Node D
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
Node B
Send C2
RSSI
Send C1
Node C
Node D
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
RSSI
Node B
Send C2
RSSI
Send C1
Node C
Node D
RSSI
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
RSSI
Node B
Send C2
RSSI
Send C1
Node C
Node D
RSSI
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
RSSI
Node B
Send C2
RSSI
Send C1
Node C
Node D
Send E1
RSSI
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
RSSI
Node B
Send C2
RSSI
Send C1
Node C
Node D
Send E1
RSSI
Node E
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Synchronization Illustration
Network
T0
T1L
T2L
T3L
Node A
RSSI
Node B
Send C2
RSSI
Send C1
Node C
Node D
Send E1
RSSI
Node E
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Results - Scalability
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Results - Parallelism
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Measurements

• Accurate timing useful for
• AEON power and lifetime estimation
• MAC layer tuning
• Debugging driver code
• Latency estimation for in-network processing
• Real-time monitoring

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Channel Utilization
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Partial Preamble Loss

• Real radios take time to lock on
• First few bits of transmission lost
• Subsequent bytes misaligned
• MAC software layer must compensate
• Latency L between transmission and first
  reception larger
• Admits more concurrency in simulation

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Adaptive Synchronization

• Assume first k ? kl, kh bits lost of first
  bytes transmitted
• Latency for first byte is then
• Lf L kl cyclesbit

Tk
TkL
T0
Tk2L
Tk3L
S A1
S A3
S A4
S A2
Node A
Node B
kl
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Back to the Question

• Can we achieve simulation of entire sensor
  networks?
• --1 And make it precise? yes
• --2 And make it flexible? yes
• --3 And make it fast? yes
• --4 And make it scalable? yes

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Future Work

• Performance Improvements
• Sleeping nodes, MN thread model
• Single-node improvements
• Port to other mote platforms
• Co-simulation with real network
• Implement partial preamble loss
• Measure properties of k

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Acknowledgements

• NSF money
• Jens Palsberg patience
• Daniel Lee device implementations
• Simon Han testing, timing validation
• Olaf Lansiedel AEON energy model
• CENS access to a stupidly big Sun V880 machine
• Sun for donating said machine