Behavioural modelling and simulation for micronano systems design purposes

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Behavioural modelling and simulation for micronano systems design purposes

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successful work with Verilog-A and modeling of complicated analog and ... Reduction of the MEMS design to a fast capture using lumped Verilog-A elements, ... –

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Title: Behavioural modelling and simulation for micronano systems design purposes


1
Behavioural modelling and simulation for
micro/nano systems design purposes
  • Proposed by Smartcom-Bulgaria AD, Sofia
  • (system integrator in telecom HW assembly
    embedded systems telecom services
    microelectronics department)
  • Experience and capacity in
  • testing, verification and validation of
    electronic
  • devices down to 90nm and 65 nm,
  • simulation of complex electronic systems using
  • Verilog-A based modelling of their
    parts,
  • design automation Cadence SKILL, Perl, C
  • Cooperation with TU Sofia and Univ. of Sofia in
    the MST area for the next years.

2
  • Smartcom will follow the ENIAC strategic
    directions corresponding to the domains More
    Moore, Design Automation, and More than
    Moore
  • Radio Frequency, High Voltage,
    Micromechanics
  • There are micro/nano systems cross cutting issues
    with the ENIAC ETP
  • Highly reliable smart systems will contain
    electrical
  • and non-electrical components
    (functions),
  • Silicon chips will have eyes, ears, arms and legs
  • (MEMS electronics software) that
    allow
  • humans to demonstrate their
    intelligence,
  • Greater heterogeneous integration without
  • necessarily using lower process node.
  • The system design will need a continuous
    behavioural
  • modelling and simulation improvement.

3
  • Smartcom is able to contribute to this, based on
  • successful work with Verilog-A and modeling of
    complicated analog and digital circuits,
  • proved experience with the best classical EDA and
    CAD tools and systems,
  • ability to improve existing DA tools and even
    develop new tools,
  • accumulated past experience in ASIC design,
  • The aim is to facilitate the simulation of
    complete heterogeneous
  • systems in various modes of operation.
  • MEMS/NEMS behaviour simulation within an ASIS
    (SoC, SiP),
  • Reduction of the MEMS design to a fast capture
    using lumped Verilog-A elements,
  • The reverse top-down simulation and analysis
    from the system to the MEMS to generate MEMS
    design recommendations (at least for some
    classes of MEMS),
  • Verilog-A electrical, mechanical, thermal,
    fluidic, optical
  • Behavioural modelling of the electronic blocks as
    well

4
Main objectives
  • Move the Company more deeply into the ENIACs
  • More than Moore domain,
  • Start activity according to the EPoSS SRA
  • Establish partnerships with multi-national
    corporations
  • and academia
  • Contribute to
  • integration of electrical and non-electrical
    components (enhancing electronics with
    non-electronic functions)
  • integration of more functions into a single
    (sub-) system
  • realization of interfaces for different
    application environments
  • short time to market processes and low cost
    solutions
  • highly reliable systems

5
Expected results
  • Quick system project verification (short time to
    market
  • and low cost)
  • The involved Bulgarian participants will enter a
    new
  • research field that of MEMS/NEMS
  • They will set out on the roads described in the
    ENIAC
  • and EPoSS Strategic Research Agendas
  • As an SME, Smartcom will be able to contribute to
  • market scouting and market development by
  • demonstrating the models behaviour to the
    users.

Profile of partners searched
  • Micro/nano system developers with component
  • behavioural simulation needs in complex
    electronic
  • systems multi-national corporation
    academia
  • CP (Collaborative project), preferably IP
  • Coordinator wanted
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