Title: The ESA MUSIC Project MultiUser
1The ESA MUSIC Project Multi-User Interference
Cancellation - ESA/ESTEC Contract 13095/98/NL/SB
- Advanced Mobile Satellite Systems Technologies
presentation days - ESA./ESTEC 14-15 November 2000
2The MUSIC Project Mission
- The MUSIC experiment
- (Multi-USer Interference Cancellation receiver)
- is a research project supported by the European
Space Agency - which is aimed at the validation of an
- Adaptive Interference Mitigating Detector
- suited for use in a CDMA-based mobile satellite
network
3The MUSIC Project Mission
- The MUSIC experiment
- (Multi-USer Interference Cancellation receiver)
- is a research project supported by the European
Space Agency - which is aimed at the validation of an
- Adaptive Interference Mitigating Detector
- suited for use in a CDMA-based mobile satellite
network
4MUSIC Breadboard Setup
5Presentation Outline
- Overall System Description and Architectural
Issues(M. Luise, CPR) - Design of DSP HW and Analog TX/RX ends(G.
Colleoni, STM) - Breadboard HW partitioning and ASIC Design(L.
Fanucci, CPR)
6Technical Specs Tables MUSIC TX 1/2
7Technical Specs Tables MUSIC TX 2/2
As output from WP200
8Technical Specs Tables MUSIC RX 1/2
9Technical Specs Tables MUSIC RX 2/2
lt
lt
As output from WP200
10Breadboard Control and Monitoring via LabVIEW
11Breadboard Control and Monitoring via LabVIEW
12A Corner of the MUSIC Lab in Pisa
13The MUSIC TX SW Setup
14The MUSIC TX SW Setup
15 SW CDMA Signal Generation ...
16 AWG Loading and Run
PC Slot
AWG
17Sat Channel Emulation Noise Generation
MUSIC Testing Overall Set-up
LabView Virtual Instrument
NOISECOM UFX 7107
18The MUSIC TX/RX Analog IF front-end
More in the presentation to follow by G.
Colleoni, STMicroelectronics
19MUSIC RXDirect IF sampling
Spectrum after A/D conversion
Digital downconversion to baseband
20The PROTEO Signal Processing Board
21The PROTEO Signal Processing Board
22MUSIC RX Architecture
More on HW partitioning to follow by L. Fanucci,
CPR-Team
23The Digital Multi-Rate Front-End 1/2
Downconverting to Baseband via a DCO
fIFD
BB
24The Digital Multi-Rate Front-End 2/2
Cascaded Integrator-Comb (CIC) Filter
A low-complexity solution to perform low-pass
filtering and decimation with no noise spectrum
aliasing
25Ancillary Receiver Functions
SYNCHRONIZATION Timing Spreading code
acquisition Chip clock tracking Carrier
Carrier frequency tracking Carrier phase
recovery
DETECTION Signal Interpolation Signal sense
MONITORING AND MEASUREMENT Signal-to-noise plus
interference ratio Bit error rate Chip Timing
Carrier Loop Lock
26Code Timing Acquisition Unit (CTAU)
Correlation Time L symbol intervals
27Performance of CTAU with Different Kind of Pilots
28Linear Interpolation Unit (LIU)
Td Tc/4
lminteger delay, mmfractional delay
29Chip Clock Tracking Unit (CCTU)
30Chip-timing Error Detector (CED)
Non-coherent, non decision-aided processing
Lock detector not shown
31Automatic Frequency Control Unit (AFCU)
Frequency Error Detector (FED)
32Carrier Phase Recovery Unit (CPRU)(embedded with
EC-BAID)
Decision-Aided at EC-BAID output !
33The MUSIC core The EC-BAID 1/2
E
EC-BAID Extended Complex-valued Blind Adaptive
Interference-mitigating Detector is a baseband
single-channel digital detector to counteract
multiple-access interference
F. Giannetti. R. De Gaudenzi, M. Luise "Design
of a Low-Complexity Adaptive Interference-Rejectio
n Detector for DS/SS Receivers in CDMA Radio
Networks", IEEE Trans. Commun, vol. COM-46 n. 1,
Jan 1998.
34The MUSIC core The EC-BAID 2/2
The C-BAID is a linear adaptive detector with
complex-valued coefficients h1(m) , m0,1,...,L-1
CMF outputs array
35Features of the EC-BAID
- Blind no need for training sequences to aid
algorithm convergence, nor knowledge of
interferers' parameters - Robust to asynchronous MAI even for large
interferer-to-useful channel power ratios - Insensitive to the unknown phase of the useful
signal and compatible with conventional QPSK
phase estimators - Robust to residual carrier frequency errors with
respect toconventional DA-MMSE - Insensitive to carrier frequency offsets on the
interfering signals - Suited to low-power ASIC implementation on a
low-cost user terminal.
J. Romero-Garcia, F. Giannetti. R. De Gaudenzi,
M. Luise A Frequency Error Resistant Blind CDMA
Detector",IEEE Trans. Commun., July 2000
36Interference-Mitigation Capability of EC-BAID
Spreading FactorL64 WHE-PN Codes 1 User 18
Interferers6 dB STRONGER than the useful channel
each. (C/I)sc-6 dB
37The EC-BAID ASIC with Embedded CPRU 1/2
38The EC-BAID ASIC with Embedded CPRU 2/2
0.25 mm Technology
More on ASIC Design to follow by L. Fanucci,
CPR-Team
R. De Gaudenzi, E. Letta, L. Fanucci, F.
Giannetti, M. Luise "VLSI Implementation of a
CDMA Blind Interference-Mitigating Detector", to
appear on the IEEE Jou. Sel. Areas Commun
39Some Results Bit-True Simulations 1/2
40Some Results Bit-True Simulations 2/2
4170MHz IF CDMA Signal Noise
Chip Rate 2.048 Mchip/s L64, Bit-rate64
kb/s DataPilot Channel
42BB Filtered/Interpolated Digital CDMA Signal
43The Double-PROTEO Config with EC-BAID on FPGA
44Current Status and Further Development Steps
- EC-BAID FPGA Implementation finalized
- ASIC layout finalized
- Final Receiver BER Testing Started
- ASIC foundry run scheduled
- ASIC Integration and Testing planned
Soon to be ended...
45CIC Equalization
46Signal Decimation with the CIC Filter 1/2
rdecimation factor
47Signal Decimation with the CIC Filter 2/2
Thats How the CIC Works
48AWG Aperture Equalizer
49TX/RX Filtering
IF Filter
Mixer
fIF
fIFD
AWG
SignalMAI
fLO
To Noise Generation
Combining
more in the detailed presentation
Local Oscillator
50HW Partitioning of RX Functions
51Bit-True Design Sample (Hierarchical Diagram)
52CCTU Lock Detector
Low-pass Filtering
Threshold with Hysteresis
Nonlinearity
53The EC-BAID Long-term BER Dirft
54Adaptive EC-BAID with Leakage
Standard EC-BAID
55Leak Factor Optimization
56Optimization of the EC-BAID Window Length
Optimum Length 2 symbol intervals (0.510.5)
57EC-BAID Functional Block Diagram 1/2
58EC-BAID Functional Block Diagram 2/2