New IBIS Cookbook

1
New IBIS Cookbook

• 1.0 Introduction
• 1.1 Quick Overview of an IBIS File
• 1.2 Steps to creating an IBIS Model
• 2.0 Pre-Modeling Steps
• 2.1 Basic Decisions
• Model Version and Complexity
• Specification Model vs. Part Model
• Fast and Slow Corner Model Limits
• Inclusion of SSO Effects
• Mention of Pin Mapping
• 2.2 Information Checklist
• 2.3 Tips For Component Buffer Grouping
• 3.0 Extracting the Data
• 3.1 Using Spice to IBIS (s2ibis)
• 3.1 Extracting I/V and Switching Data via
  Simulations
• 3.1.1 Extracting the I/V Data
• Simulation Setup
• Sweep Ranges
• Making Pullup and Power Clamp Sweeps Vcc
  Relative

2
New IBIS Cookbook

• 4.0 Putting the Data Into an IBIS File
• 4.1 IBIS File Header Information
• 4.2 Component and Pin Information
• 4.3 The Model Keyword
• Parameter section
• Temperature and Voltage Keywords
• I/V data section
• Pulldown
• Ground Clamp
• Pullup
• Power Clamp
• Extrapolation Errors
• Ramp and Waveform Tables
• 4.4 Thresholds Delay
• Vinh, Vinl
• Model Spec
• 4.5 External Package Models
• See ICM Package Cookbook

3
New IBIS Cookbook

• 5.0 Examples of Common Model Types
• CMOS totem-pole (input, output, I/O)
• Concept include only necessary I-V and V-t
  curves
• I/O CMOS buffer with termination
• Concept clamp counting
• PECL/ECL
• Concept supply referencing
• Multi-stage buffers
• Concept Using Driver Schedule
• Differential buffers
• Concept Using Diff Pin
• Pre-emphasis? Current-mode?
• Bus Hold
• Concept Using Submodel
• Highlight only differences from generic steps
  shown earlier

4
New IBIS Cookbook

• 6.0 Validating the Model
• 7.0 Correlating the Data
• 8.0 Resources
• Simple updates

5
ICM Cookbook

• 1.0 Introduction
• 1.1 Quick Overview of an ICM File
• 1.1.1 Families
• 1.1.2 Models
• 1.1.3 Sections
• 2.0 Pre-Modeling Steps
• 2.1 Basic Decisions
• What cases within the family?
• S-parameters or RLGC?
• RLGC Lumped or Distributed?
• RLGC What frequency?
• Tree or Nodal?
• 2.2 Information Checklist
• Pictures? Lengths?