Ray Tracing Hardware II

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Ray Tracing Hardware II

• Anselmo Lastra

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Topics

• SaarCor on FPGA
• http//www.saarcor.de/
• SIGGRAPH 2005 paper, programmable ray tracing
  hardware
• ART

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FPGA Ray Tracer

• GH 2004 implementation of SaarCor
• With changes
• Support for dynamic objects
• Keep a different spatial index for each object
• So objects are in different spatial data
  structures
• Affine transform to position, per frame, in
  top-level scene
• To simplify computation, they used a ray-triangle
  intersection scheme that is mostly a
  transformation
• http//graphics.cs.uni-sb.de/jofis/SaarCOR/DynRT/
  DynRT.html

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Intersection Test

• The intersection is with a unit triangle, so is
  very simple
• Ray generation also done using transform unit

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Block Diagram
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Ray Processing

• RGS generates ray and transform
• Sent to Transformation unit via a
• Transformed ray sent to traversal via b
• Traversal goes down kd-tree to leaf
• List unit fetches objects
• Intersection is computed
• Final hit sent to RGS via g
• Really the loop also includes another
  transformation to map ray to object space

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Specialized Caches

• Not much detail

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Datapaths
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Implementation

• 24-bit floating point (16/8)
• SRAM, partitioned
• 2 banks for frame buffer
• 1 bank for shading parameters
• 3 banks for kd-tree
• One intersection unit
• Packets of 4 rays are traversed

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Floating Point Requirements
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Comparison to CPU
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Implementation Stats
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Saarland 2005 Paper

• Less special purpose than 2004 design
• Move toward style of current GPUs
• Multiple SIMD units
• Operations on vectors of size 4
• Multi-threaded
• Register stack
• Trace instruction to spawn rays
• Special-purpose traversal unit (TPU)
• Scalar, not vector
• Fixed function
• List processing unit (MPU)

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Full System
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SPU Block Diagram
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RPU
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Performance
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Advanced Rendering Technology

• Make accelerators for offline ray tracing
• High-quality
• RenderMan shading
• Chip
• 1.8M gates
• 64 32-bit FPUs
• Block diagram next

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AR 350
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Other Efforts

• Hiroaki Kobayashi, Ken-ichi Suzuki, Kentaro Sano,
  Nobuyuki Oba, Interactive Ray-Tracing on the
  3DCGiRAM Architecture, ACM MICRO-35
• J. Fender and J. Rose, "A High-Speed Ray Tracing
  Engine Built on a Field-Programmable System," in
  IEEE International Conf. On Field-Programmable
  Technology, December 2003, pp. 188-195.
• Also see Reshetov, Soupikov, Hurley, Multi-Level
  Ray Tracing Algorithm, SIGGRAPH 2005