Title: Images%20of%20ElectroStatic%20Discharge%20Damage
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- Images of ElectroStatic Discharge Damage
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2Images of ESD damage
Damage visible using Scanning Electron
Micrograph (SEM) after significant enhancement
by delayering and etch enhancement. Used with
permission of Hi-Rel Laboratories, Inc. Spokane
WA 99217 www.hrlabs.com
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3Photo of ESD arcing from finger to component This
is not a computer simulation. Technician was
connected to a small magneto
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4This is not HBM-ESD. Extensive damage on this
transistor where the bond has melted is typical
of surges from Inductors, Transformers, and
Motors.
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5Arcing of this nature within an integrated
circuit is typical of testing damage. Human
Body Model ESD does not create sufficient damage
to be seen in an optical microscope.
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6Optical photo of a large Integrated Circuit which
has experienced ESD damage to the pin noted by
the arrow.
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7Higher magnification photo of pin noted by the
arrow in the prior slide This taken at 400
times magnification on a 4" X 5" photo. The
damage is noted as the "fuzz" at the end of the
arrow.
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8Now you see it!! Overlying glassivation has been
removed and the surface decorated to show the ESD
damage at 5,000 times magnification in this
scanning electron micrograph.
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9Techniques used to locate HBM-ESD damage in an
integrated circuit. Clockwise from the upper
left optical photo at 400X shows no damage. The
upper right hand scanning electron micrograph
(SEM) shows no damage. The lower right hand
image is the current flow in the device
which shows a subsurface arc between the two
metal lines. The lower left photo is a
combination of the SEM image and the current flow
image.
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10Scanning electron micrograph (SEM) image of the
device in prior slide after glassivation removal
and surface decoration. The enlargement 2,000
times magnification.
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11Optical micrograph of an Integrated Circuit
damaged by HBM ESD. Damage has occurred in the
large thin oxide metal capacitor in the upper
center of the image. However, no physical damage
is visible.
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12Scanning electron micrograph (SEM) image of the
ESD damage after removal of the capacitor
metallization. Note the characteristic eruption
thru the oxide. Magnification is 10,500 times.
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13Optical image of an Integrated Circuit damaged by
HBM ESD. The second pin from the bottom left is
good and its mirror image, second from the right
is damaged. However, no physical damage is
visible.
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14Scanning electron micrograph (SEM image of the
damage site on the Integrated Circuit shown in
prior slide. Metal has been removed expose the
underlying damage site. Magnification is 6,450
times.
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