Real Space Transfer...

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Real Space Transfer...
...Karls Baby Matures !
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July 1976
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(No Transcript)
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Real-Space Transfer
return back may be slow at least at low
temperatures
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RST versus MST
microwave activity in RST is hard to
experimentally distinguish from that arising from
the Gunn (MST) effect
The interplay between the RST and the Gunn effect
treated magisterially by Kizilyalli and Hess
(1989) by Monte-Carlo simulation of hot electrons
in GaAs/AlGaAs heterostructures
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Real Space Transfer Transistors
Controlling the effective electron temperature Te
Current
Thigh
Tlow
Voltage
RST Transistor CHINT Kastalsky and Luryi (1983)
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Compound semiconductor CHINT
Bell Labs, 1990-93
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I-V Characteristics
Mensz et al (APL 1990) gm gt 10 S/mm PTV gt 100
at 4 K ....... PTV gt 10,000 at 300 K ....... PTV
gt 8 quest over
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Broken symmetry states
Luryi and Pinto (Phys. Rev. Lett. 1991)
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Frequency Characteristicsup your collectors,
gentlemen !
Maezawa and Mizutani (1991) analyzed CHINT versus
FET mode in the same device CHINT three times
faster! But heed Karls warning about
MST interference, Gunn is relatively slow !
Belenky et al (1993)
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Materials
GaAs/AlGas Kastalsky, Luryi, Gossard
(1983-84) InGaAs/InAlAs Luryi, Mensz, Cho
(1989-91) LED CHINT Mastrapasqua
(1993) InGaAs/InP Belenky, Luryi, Cho, Hamm
(1993) Si/GeSi Mastrapasqua, King (1996) Bi/Si
triode Luryi, Tung (1988) unsuccessful Si/high
? believe feasible, ideal for SOI
Si/high-K believe can be done, ideally SOI
Maturity is when silicon does it !
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Desired Si/high-K structures
undoped Si channel
low-barrier dielectric
collector
SiO2
p Si substrate
n polySi
Bulk Si substrate
SOI
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Whats no good for the goose may be sauce for
the gander !
Kawamoto et al, J. Appl. Phys. 90, 1333-1341
(2001)
silicon zirconium silicate
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What controls band offsets ?
Charge transfer between virtual gap states
(VGS) a.k.a. metal-induced gap states (MIGS)
to establish a common Fermi level, called the
charge neutrality level (CNL)
CB
CB
CB offset
SBH
CNL
CNL
VB offset
VB
VB
Si
Oxide
Oxide
Metal
CNL of Si is low in the gap (0.2 eV) for most
oxides it is high in the gap hence low CB offset
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Calculated band offsets (between Si and metal
oxides)
one mans worry is another mans joy !
J. Robertson, MRS Bulletin (March 2002)
http//www.mrs.org/publications/bulletin
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Why SOI ?
Bulk Si substrate
SOI
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Speed of silicon CHINT

• In principle, Si CHINT is faster than GaAs, etc
• In compound semiconductors the RST is slowed by
  the momentum-space transfer (Karl Hess)
  recall InGaAs/InP was faster than InGaAs/InAlAs
• SOI minimizes parasitic capacitances
• drain to body especially (D control
  electrode!)
• Expect subpicosecond operation

• Hey, silly cone, where are you ? We wanna
  mature !

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Symmetry and Logic
S
D
IC XOR (S, D)
C
similar symmetry exists in FET
but it is not important, because G is not the
output terminal
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ORNAND
cyclical electrode symmetry
X1 X2 X3 IC
0 0 0 0
0 1 0 1
1 0 0 1
1 1 0 1
0 0 1 1
0 1 1 1
1 0 1 1
1 1 1 0
X1
X3
X2
X3
OR
barrier
C
NAND
IC ORNAND (X1, X2, X3)
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Expt CHINT LED

• Mastrapasqua et al, 1993
• InGaAs/InAlAs
• Complementary collector
• ORNAND function both electric and optical
• T 300 K
• Later Si/GeSi ORNAND (electrical only, of course)

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Preliminary verdict

• Real space transfer Si/high-K transistors
• Highly desirable, functional high-speed device,
  perfectly compatible with VLSI, ideal for SOI
• Unproven, hopefully will come out as a bonus of
  the currently fashionable quest for high-K gate
  dielectrics
• NDR controlled by 3rd terminal immediate
  applications as VCO
• Higher-level logic... value questionable
• Worth pursuing

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When Karls baby matures...
... silicon takes over the RST ... I shall also
retire in Hawaii ... and we shall scream
III-Vs were first ! but will silicon listen ?
Here lies Gallium R. Senide, brash and romantic
youth