Domino Logic Synthesis based on Implication Graph

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DAC 2000
Domino Logic Synthesis Minimizing Crosstalk
Ki-Wook Kim, Unni Narayanan and Sung-Mo Kang
ECE Department Univ. of Illinois at
Urbana-Champaign

• Intel Corporation, Santa Clara

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Outline
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Milestone
Introduction
Crosstalk noise
Crosstalk
Crosstalk model for domino logic CIS (Crosstalk
immunity set)
CIS identification
ATPG-based CIS identification
CIS-driven Logic synthesis
CIS-driven output phase assignment
CIS-driven Track assignment
Track perturbation (move, swap,
permute) Simulated annealing
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Domino Logic

• Precharge phase

• Evaluation phase

Evaluation node
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Domino Logic Property

• Domino logic - Pros and Cons
• good candidate for high performance control logic
  design and data path design due to low switching
  threshold
• smaller silicon area
• high fan-in complex gates are possible
• lower noise margin
• higher power consumption due to high activity in
  clock
• irreversible logic evaluation due to monotonic
  property

• Monotonic property
• Only non-inverting functions can be realized in
  domino logic

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Noise on Domino Logic

• Charge sharing
• Charge leakage
• Capacitive coupling
• Ground bounce IR drop
• Miller kickback

Evaluation node
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Roadmap

• International technology roadmap for
  semiconductors (1999)

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Interconnect Coupling Effects

• Cross-coupling capacitance (Cx) as a dominant
  factor in nanometer technology J. Cong, 1997

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Crosstalk

• What is crosstalk ?
• Capacitive or inductive interaction between
  adjacent interconnects (victim net and aggressor
  net)
• Crosstalk noise affects the functionality and the
  timing response of the circuit
• Crosstalk delay
• Speed up
• Slow down

• How to cope with crosstalk
• Net spacing
• Track permutation
• Track assignment
• Shielding

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Crosstalk in Domino Logic

• Domino logic properties
• If value (x) 0, then signal x is a potential
  victim
• If value (x) 1, then signal x is a potential
  aggressor

• Crosstalk immunity
• signal x is immune to the crosstalk from
  signal y
• If signal y is 0 whenever signal x is 0, then
  there is no crosstalk on x due to y
• or
• If coupling effect from signal y cannot be seen
  from primary output, then there is no effective
  crosstalk

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Motivation

• Crosstalk
• immunity set
• x, y, w
• z

Convention
Proposed scheme
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Milestone
Introduction
Crosstalk noise
Crosstalk
Crosstalk model for domino logic CIS (Crosstalk
immunity set)
CIS identification
ATPG-based CIS identification
CIS-driven Logic synthesis
CIS-driven output phase assignment
CIS-driven Track assignment
Track perturbation (move, swap,
permute) Simulated annealing
Conclusion
Experimental results and conclusion
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Crosstalk Model for Domino Logic
l

• Physical coupling between net v and net a

d
Cx
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• Maximum crosstalk (effective coupling
  capacitance)
• that net v can experience

• Compatible signal set (CSS)

• Crosstalk immunity set (CIS)

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Milestone
Introduction
Crosstalk noise
Crosstalk
CSS (Compatible signal set) CIS (Crosstalk
immunity set)
CIS identification
ATPG-based CIS identification
CIS-driven Logic synthesis
CIS-driven output phase assignment
CIS-driven Track assignment
Track perturbation (move, swap,
permute) Simulated annealing
Conclusion
Experimental results and conclusion
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Crosstalk Immunity Set (CIS)

• Crosstalk immunity for domino logic
• Logical crosstalk immunity
• freedom of cross-coupling between two signals due
  to their logical behavior
• Temporal crosstalk immunity
• if the crosstalk effect cannot reach the latch
  input within a clock period, then the crosstalk
  has no effect on the circuit functionality

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ATPG-based CIS Identification

• Bottom line
• a fault-free combinational circuit consisting of
  non-negative gates
• Set of mandatory assignments SMA(v,q,k)
• a set of ordered pairs ltx,val(x)gt such that
  SMA(v,q,k) is a necessary and sufficient
  condition to generate a single stuck-at-k fault
  on v, and to propagate the fault to the primary
  output q
• Set of path assignments SPA(v,q,k)
• a set of ordered pairs ltx,val(x)gt such that any
  path between v and all primary outputs includes
  x, and val(x) is a value when vk' under
  SMA(v,q,k)

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• Theorem compatible signal set for signal v

SMA
SPA
1
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• Lemma Transitivity of CSS

• Crosstalk immunity set (CIS)

• Theorem
• a crosstalk immunity set is an equivalence class
  over the whole set of nets

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CIS Example
9 colors
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Milestone
Introduction
Crosstalk noise
Crosstalk
Crosstalk model for domino logic CIS (Crosstalk
immunity set)
CIS identification
ATPG-based CIS identification
CIS-driven Logic synthesis
CIS-driven output phase assignment
CIS-driven Track assignment
Track perturbation (move, swap,
permute) Simulated annealing
Conclusion
Experimental results and conclusion
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Phase Assignment Example
5 colors
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Milestone
Introduction
Crosstalk noise
Crosstalk
Crosstalk model for domino logic CIS (Crosstalk
immunity set)
CIS identification
ATPG-based CIS identification
CIS-driven Logic synthesis
CIS-driven output phase assignment
Track assignments (move, swap,
permute) Simulated annealing
CIS-driven Track assignment
Conclusion
Experimental results and conclusion
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Routing with CIS

• Given
• Initial solution for grid channel routing using
  left-edge algorithm
• Objective
• minimize the maximum crosstalk between adjacent
  wires by moving, swapping, and permuting nets
  that are colored using CIS information

Move
Swap
Permute
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Track Assignment

• Initial routing Left-edge algorithm
• Simulated annealing for track perturbation
• cost function

where and are adjacent nets, and
the switching activity is defined as
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Max crosstalk
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Milestone
Introduction
Crosstalk noise
Crosstalk
Crosstalk model for domino logic CIS (Crosstalk
immunity set)
CIS identification
ATPG-based CIS identification
CIS-driven Logic synthesis
CIS-driven output phase assignment
CIS-driven Track assignment
Track perturbation (move, swap,
permute) Simulated annealing
Conclusion
Experimental results and conclusion
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Domino Logic Synthesis Flow
Circuit netlist

• ATOM for evaluating
• SMA condition Ilker Patel

Tech. Ind. Opt. (SIS)
CIS identification output phase assgn.
CIS info.
Tech. mapping
Placement Routing
Track assignment
Optimal routing
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Experimental Results
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Summary

• Crosstalk immunity set
• CIS identification based on ATPG technique
• Logic synthesis to minimize net colors
• Output phase assignment
• CIS-driven track assignment
• 30 of maximum crosstalk has been reduced
• Future work
• temporal crosstalk immunity
• CIS for static CMOS logic