CMPUT329%20-%20Fall%202003

1
CMPUT329 - Fall 2003

• TopicH Building a Data Path and a Control Path
  for a Microprocessor
• José Nelson Amaral

2
A Sample Problem
We know that all the functions of a digital
computer are implemented from three basic
logic operations AND, OR, and NOT.
The following is a legal add instruction in the
MIPS microprocessor ADD s1, s2, s3
How is the addition of two integers constructed
from these three basic operations?
3
Representing Instructions R-Type Instructions
add 8, 17, 18 This instruction has 3
operands. The data that is operates on is stored
in registers. It adds the content of registers
17 and 18 and stores the result in register
8. Its meaning can be summarized as follows 8
? 17 18
4
Representing Instructions Memory Instructions
lw 7, 68(9) Read the memory location addressed
by the value in register 9 plus 68 and store
the value in register 7 Its meaning can be
summarized as follows 7 ? Memory9 68
5
Representing Instructions Memory Instructions
sw 13, 56(17) Write the value currently in
register 13 in the memory location addressed by
the value in register 17 plus 56 Its meaning
can be summarized as follows Memory17 56 ?
13
6
Representing InstructionsBranch Instructions
bne 1, 2, 100 Add 4 to the PC. If the value in
register 1 is not equal the value in register
2, then add 100 to the PC before fetching the
next instruction. Its meaning can be summarized
as follows PC ? PC 4 if(1 ? 2) PC ? PC
100
7
Building a DatapathInstruction Memory
Write
Read address
Adder
Memory
Sum
Instruction
Program Counter
Instruction Memory
Adder
8
Building a DatapathPC Incrementer
Adder
Sum
Write
4
PC
Read address
Memory
Instruction
9
Building a Data PathRegister File and ALU
RegWrite
32
Data
32
ALU operation
Register File
ALU
10
A Two Read Port File with n Registers
M u x
Reg. 0
C D
5-to-32 decoder
Reg. 1
C D
C D

M u x
Reg. n-2
C D
Reg. n-1
C D
11
(No Transcript)
12
Building a Data PathR-Type Instruction
Read register 1
Read data 1
Zero
Read register 2
ALU result
Write register
Read data 2
ALU
Write data
Registers
add 8, 17, 18
000000
10001
10010
01000
00000
100000
13
Building a Data PathLoad/Store Instructions
MemWrite
MemRead
Read address
Data Memory
Write address
MemData
Write data
Data Memory Unit
14
Building a DataPathLoad/Store Instructions
Read register 1
Read data 1
Read address
Zero
Read register 2
Data Memory
ALU result
Write register
Write address
Read data 2
ALU
Write data
MemData
Registers
Write data
Sign ext.
lw 7, 68(9)
15
Building a DataPathLoad/Store Instructions
Read register 1
Read data 1
Read address
Zero
Read register 2
Data Memory
ALU result
Write register
Write address
Read data 2
ALU
Write data
MemData
Registers
Write data
Sign ext.
sw 13, 56(17)
16
Combining Memory and Register Instr. Datapaths
RegWrite
MemWrite
MemRead
Read register 1
Read data 1
Read address
Zero
Read register 2
Instruction
Data Memory
ALU result
32
Write register
Write address
Read data 2
ALU
Write data
MemData
M u x
Registers
Write data
ALU operation
Sign ext.
sw 13, 56(17)
add 8, 17, 18
17
Building a DataPathBranch Instructions
Adder
Sum
Shift left 2
Read register 1
Read data 1
Zero
Read register 2
Write register
Read data 2
ALU
Write data
Registers
Sign ext.
bne 1, 2, 100
31 26
15 0
20 16
25 21
000101
00001
00010
0000000001100100
18
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
Memory
Instruction
RegWrite
ALUSrc
MemWrite
MemRead
MemtoReg
Read register 1
Read data 1
Read address
Zero
Read register 2
Instruction
Data Memory
ALU result
32
Write register
Write address
Read data 2
ALU
Write data
MemData
Registers
Write data
I(5-0)
19
Destination Register for Load and R-Type Instr.
31 26
15 0
20 16
25 21
add 8, 17, 18
The Destination register of a load is specified
in I20-I16, but for an R-Type instruction the
destination is specified by the bits I15-I11.
Therefore we need a multiplex in the data path
of the write register.
20
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
Memory
Instruction
RegWrite
ALUSrc
MemWrite
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
32
Write register
Write address
Read data 2
ALU
0
Write data
MemData
M u x
Registers
Write data
1
32
ALU control
Sign ext.
I(15-0)
I(5-0)
ALUOp
21
Four Steps of an R-type Instruction
1. Fetch Instruction from instruction memory, and
increment PC. 2. Read two registers (I25-I21)
and (I20-I16) from the register file. 3. Use
bits I5-I0 from the instruction code to determine
the function that the ALU performs on the
data read from the register file. 4. Write
the ALU result to the destination register
(I15-I11).
22
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
R-Type Instruction First Step Instruction Fetch
Memory
Instruction
RegWrite
ALUSrc
MemWrite
RegDst
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
32
Write register
Write address
Read data 2
I(15-11)
ALU
0
Write data
MemData
M u x
Registers
Write data
1
32
ALU control
Sign ext.
I(5-0)
ALUOp
23
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
R-Type Instruction Second Step Read Source
Registers
Memory
Instruction
RegWrite
ALUSrc
MemWrite
RegDst
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
0
32
M u x
Write register
Write address
Read data 2
I(15-11)
ALU
1
0
Write data
MemData
M u x
Registers
Write data
1
32
I(5-0)
ALUOp
24
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
R-Type Instruction Third Step ALU Operates on
Registers
Memory
Instruction
RegWrite
ALUSrc
MemWrite
RegDst
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
0
32
0
M u x
Write register
Write address
M u x
Read data 2
I(15-11)
ALU
1
1
0
Write data
MemData
M u x
Registers
Write data
1
32
I(5-0)
ALUOp
25
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
R-Type Instruction Final Step Write the Result
Memory
Instruction
RegWrite
ALUSrc
MemWrite
RegDst
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
0
32
0
M u x
Write register
Write address
M u x
Read data 2
I(15-11)
ALU
1
1
0
Write data
MemData
M u x
Registers
Write data
1
32
I(5-0)
ALUOp
26
Four Steps for a load Instruction
1. Fetch Instruction from instruction memory, and
increment PC. 2. Read one register (I25-I21)
from the register file. 3. The ALU computes the
sum of the value read from the register file
and the sign-extended lower 16 bits of the
instruction (offset). 4. Use the result of the
ALU as an address to the data memory. 5. Write
the data from the memory unit to the destination
register (I20-I16).
27
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
Memory
DataPath for a Load Instruction
Instruction
RegWrite
ALUSrc
MemWrite
RegDst
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
0
32
0
M u x
Write register
Write address
M u x
Read data 2
I(15-11)
ALU
1
1
0
Write data
MemData
M u x
Registers
Write data
1
32
ALU control
Sign ext.
I(5-0)
ALUOp
28
Four Steps for a branch-on-equal Instruction
1. Fetch Instruction from instruction memory, and
increment PC. 2. Read two registers (I25-I21)
and (I20-I16) from the register file. 3. The ALU
subtracts the data values read from the
register. Add the value PC 4 to the
sign-extended lower 16 bits of the
instruction (offset) --- the result is the branch
target. 4. Use the zero result from the ALU to
decide which adder result to store in the PC
(either the branch target or PC4).
29
0
Adder
Adder
M u x
Sum
1
Sum
Write
4
Shift left 2
PC
PCSrc
Read address
Memory
DataPath for a Branch Instruction
Instruction
Branch
RegWrite
ALUSrc
MemWrite
RegDst
MemRead
I(25-21)
MemtoReg
Read register 1
Read data 1
Read address
I(20-16)
Zero
Read register 2
Data Memory
ALU result
0
32
0
M u x
Write register
Write address
M u x
Read data 2
I(15-11)
ALU
1
1
0
Write data
MemData
M u x
Registers
Write data
1
32
ALU control
Sign ext.
I(5-0)
ALUOp
30
ALU Control
ALU Control Input
ALU control
I(5-0)
ALUOp
31
ALU Control
32
ALU Control
I2 ALUOp0 ALUOp1.F1
33
ALU Control
F3
010
110
111
X
X
X
X
X
001
X
X
X
000
X
X
X
F1
Op1
010
I1 ALUOp1 ALUOp1.F2
110
X
Op0
34
ALU Control
F3
010
110
111
X
X
X
X
X
001
X
X
X
000
X
X
X
F1
Op1
010
I0 ALUOp1.F3 ALUOp1.F0
110
X
Op0
35
ALU Control Unit
ALU Control Input
ALUOp
ALU control
I(5-0)
Function Code
ALUOp0
ALUOp
ALU Control Input
ALUOp1
ALUIn2
F1
Function Code F(5-0)
ALUOp1
ALUIn1
F2
ALUIn0
F3
F0
36
Main Control Unit